Mesa (master): nvc0/ir: no instruction can load a double immediate

Ilia Mirkin imirkin at kemper.freedesktop.org
Sat Feb 21 00:59:30 UTC 2015


Module: Mesa
Branch: master
Commit: 88127874a3eacd379f3c721bbdacdbdad4d03125
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=88127874a3eacd379f3c721bbdacdbdad4d03125

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sun Jul  6 23:39:38 2014 -0400

nvc0/ir: no instruction can load a double immediate

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 817ceb8..7d4a859 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -337,6 +337,8 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s,
    if (sf == FILE_IMMEDIATE) {
       Storage &reg = ld->getSrc(0)->asImm()->reg;
 
+      if (typeSizeof(i->sType) > 4)
+         return false;
       if (opInfo[i->op].immdBits != 0xffffffff) {
          if (i->sType == TYPE_F32) {
             if (reg.data.u32 & 0xfff)




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