Mesa (master): i965: Don' t make instructions with a null dest a barrier to scheduling.

[Matt Turner]

Module: Mesa
Branch: master
Commit: c638ea3d19d46cfe65739af2c78373146ed50737
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c638ea3d19d46cfe65739af2c78373146ed50737

Author: Matt Turner <mattst88 at gmail.com>
Date:   Wed Apr  9 13:38:14 2014 -0700

i965: Don't make instructions with a null dest a barrier to scheduling.

Now that we properly track accumulator dependencies, the scheduler is
able to schedule instructions between the mach and mov in the common
the integer multiplication pattern:

   mul  acc0, x, y
   mach null, x, y
   mov  dest, acc0

Since a null destination implies no dependency on the destination, we
can also safely schedule instructions (that don't write the accumulator)
between the mul and mach.

GAINED:                                103
LOST:                                  43

Causes one program to spill (643 -> 1076 instructions).

I committed this patch last year (commit 42a26cb5) but reverted it
(commit 0d3f83f4) after inexplicable artifacts in Kerbal Space Program
(bug 78648). Tapani reapplied this patch and could not reproduce the bug
with current Mesa.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand at intel.com>

---

 src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp |   12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
index b552cf8..40b5715 100644
--- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp
@@ -879,7 +879,8 @@ fs_instruction_scheduler::calculate_deps()
       } else if (inst->dst.is_accumulator()) {
          add_dep(last_accumulator_write, n);
          last_accumulator_write = n;
-      } else if (inst->dst.file != BAD_FILE) {
+      } else if (inst->dst.file != BAD_FILE &&
+                 !inst->dst.is_null()) {
          add_barrier_deps(n);
       }
 
@@ -1005,7 +1006,8 @@ fs_instruction_scheduler::calculate_deps()
          }
       } else if (inst->dst.is_accumulator()) {
          last_accumulator_write = n;
-      } else if (inst->dst.file != BAD_FILE) {
+      } else if (inst->dst.file != BAD_FILE &&
+                 !inst->dst.is_null()) {
          add_barrier_deps(n);
       }
 
@@ -1112,7 +1114,8 @@ vec4_instruction_scheduler::calculate_deps()
       } else if (inst->dst.is_accumulator()) {
          add_dep(last_accumulator_write, n);
          last_accumulator_write = n;
-      } else if (inst->dst.file != BAD_FILE) {
+      } else if (inst->dst.file != BAD_FILE &&
+                 !inst->dst.is_null()) {
          add_barrier_deps(n);
       }
 
@@ -1199,7 +1202,8 @@ vec4_instruction_scheduler::calculate_deps()
          last_fixed_grf_write = n;
       } else if (inst->dst.is_accumulator()) {
          last_accumulator_write = n;
-      } else if (inst->dst.file != BAD_FILE) {
+      } else if (inst->dst.file != BAD_FILE &&
+                 !inst->dst.is_null()) {
          add_barrier_deps(n);
       }