Mesa (master): freedreno/ir3: add support for memory (cat6) instructions

Rob Clark robclark at kemper.freedesktop.org
Tue Mar 3 15:41:16 UTC 2015


Module: Mesa
Branch: master
Commit: 9d732d3125e1b39788a642a5723aeb54cb1983f3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d732d3125e1b39788a642a5723aeb54cb1983f3

Author: Rob Clark <robclark at freedesktop.org>
Date:   Thu Feb 26 15:13:10 2015 -0500

freedreno/ir3: add support for memory (cat6) instructions

Scheduled basically the same as texture (cat5) instructions, using (sy)
flag for synchronization.

Signed-off-by: Rob Clark <robclark at freedesktop.org>

---

 src/gallium/drivers/freedreno/ir3/ir3.h          |    8 +++++---
 src/gallium/drivers/freedreno/ir3/ir3_depth.c    |    2 +-
 src/gallium/drivers/freedreno/ir3/ir3_legalize.c |    2 ++
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3.h b/src/gallium/drivers/freedreno/ir3/ir3.h
index a3bbba9..f90392b 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3.h
@@ -420,6 +420,11 @@ static inline bool is_tex(struct ir3_instruction *instr)
 	return (instr->category == 5);
 }
 
+static inline bool is_mem(struct ir3_instruction *instr)
+{
+	return (instr->category == 6);
+}
+
 static inline bool is_input(struct ir3_instruction *instr)
 {
 	return (instr->category == 2) && (instr->opc == OPC_BARY_F);
@@ -508,9 +513,6 @@ int ir3_block_ra(struct ir3_block *block, enum shader_t type,
 void ir3_block_legalize(struct ir3_block *block,
 		bool *has_samp, int *max_bary);
 
-#ifndef ARRAY_SIZE
-#  define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
-#endif
 
 /* ************************************************************************* */
 /* split this out or find some helper to use.. like main/bitset.h.. */
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_depth.c b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
index 76413d4..8ff62ba 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_depth.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
@@ -67,7 +67,7 @@ int ir3_delayslots(struct ir3_instruction *assigner,
 		return 6;
 
 	/* handled via sync flags: */
-	if (is_sfu(assigner) || is_tex(assigner))
+	if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner))
 		return 0;
 
 	/* assigner must be alu: */
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
index 2ef11f1..11629f6 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
@@ -168,6 +168,8 @@ static void legalize(struct ir3_legalize_ctx *ctx)
 			 */
 			ctx->has_samp = true;
 			regmask_set(&needs_sy, n->regs[0]);
+		} else if (is_mem(n)) {
+			regmask_set(&needs_sy, n->regs[0]);
 		}
 
 		/* both tex/sfu appear to not always immediately consume




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