Mesa (master): i965/nir: Sort uniforms direct-first and use two different uniform registers

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 46c35c61e9c5c1b56fdd9fcd4eb45591dd16d21d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=46c35c61e9c5c1b56fdd9fcd4eb45591dd16d21d

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Mar 18 15:18:54 2015 -0700

i965/nir: Sort uniforms direct-first and use two different uniform registers

Previously, we put all the uniforms into one big array.  The problem with
this approach is that, as soon as there was one indirect array acces, the
backend would decide that the entire large array should be pull constants.
This commit splits the array in half: first direct-only uniforms and then
potentially-indirect uniforms.  This may not be optimal, but it does let
the backend promote things to push constants.

Shader-db results on HSW:
total instructions in shared programs: 4114840 -> 4112172 (-0.06%)
instructions in affected programs:     43316 -> 40648 (-6.16%)
helped:                                116
HURT:                                  0

v2: Set param_size[num_direct_uniforms] only if we have indirect uniforms.
    This caused a bug that, strangely enough, only showed up on Broadwell
    vertex shaders.

Reviewed-by: Connor Abbott <cwabbott0 at gmail.com>

---

 src/mesa/drivers/dri/i965/brw_fs.h       |    4 +++-
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp |   27 +++++++++++++++++++++------
 2 files changed, 24 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 2f362db..8317831 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -435,6 +435,9 @@ public:
    /** Number of uniform variable components visited. */
    unsigned uniforms;
 
+   /** Total number of direct uniforms we can get from NIR */
+   unsigned num_direct_uniforms;
+
    /** Byte-offset for the next available spot in the scratch space buffer. */
    unsigned last_scratch;
 
@@ -468,7 +471,6 @@ public:
    fs_reg *nir_globals;
    fs_reg nir_inputs;
    fs_reg nir_outputs;
-   fs_reg nir_uniforms;
    fs_reg *nir_system_values;
 
    /** @{ debug annotation info */
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 8ef57af..05506f5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -105,7 +105,9 @@ fs_visitor::emit_nir_code()
    /* Get rid of split copies */
    nir_optimize(nir);
 
-   nir_assign_var_locations_scalar(&nir->uniforms, &nir->num_uniforms);
+   nir_assign_var_locations_scalar_direct_first(nir, &nir->uniforms,
+                                                &num_direct_uniforms,
+                                                &nir->num_uniforms);
    nir_assign_var_locations_scalar(&nir->inputs, &nir->num_inputs);
    nir_assign_var_locations_scalar(&nir->outputs, &nir->num_outputs);
 
@@ -168,7 +170,6 @@ fs_visitor::emit_nir_code()
    }
 
    if (nir->num_uniforms > 0) {
-      nir_uniforms = fs_reg(UNIFORM, 0);
       nir_setup_uniforms(nir);
    }
 
@@ -299,7 +300,13 @@ void
 fs_visitor::nir_setup_uniforms(nir_shader *shader)
 {
    uniforms = shader->num_uniforms;
-   param_size[0] = shader->num_uniforms;
+
+   /* We split the uniform register file in half.  The first half is
+    * entirely direct uniforms.  The second half is indirect.
+    */
+   param_size[0] = num_direct_uniforms;
+   if (shader->num_uniforms > num_direct_uniforms)
+      param_size[num_direct_uniforms] = shader->num_uniforms - num_direct_uniforms;
 
    if (dispatch_width != 8)
       return;
@@ -1456,11 +1463,19 @@ fs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr)
    case nir_intrinsic_load_uniform_indirect:
       has_indirect = true;
    case nir_intrinsic_load_uniform: {
-      unsigned index = 0;
+      unsigned index = instr->const_index[0];
+
+      fs_reg uniform_reg;
+      if (index < num_direct_uniforms) {
+         uniform_reg = fs_reg(UNIFORM, 0);
+      } else {
+         uniform_reg = fs_reg(UNIFORM, num_direct_uniforms);
+         index -= num_direct_uniforms;
+      }
+
       for (int i = 0; i < instr->const_index[1]; i++) {
          for (unsigned j = 0; j < instr->num_components; j++) {
-            fs_reg src = offset(retype(nir_uniforms, dest.type),
-                                instr->const_index[0] + index);
+            fs_reg src = offset(retype(uniform_reg, dest.type), index);
             if (has_indirect)
                src.reladdr = new(mem_ctx) fs_reg(get_nir_src(instr->src[0]));
             index++;