Mesa (master): i965/fs: Emit a single ADD instruction for SET_SAMPLE_ID on Gen8+.

[Matt Turner]

Module: Mesa
Branch: master
Commit: e2707c8765b15b7ac666067160307c7f9d2d8b4d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2707c8765b15b7ac666067160307c7f9d2d8b4d

Author: Matt Turner <mattst88 at gmail.com>
Date:   Tue Oct 20 18:31:02 2015 -0700

i965/fs: Emit a single ADD instruction for SET_SAMPLE_ID on Gen8+.

Gen8+ lifted the register region restriction that an instruction whose
destination spans two registers must have sources that also span two
registers.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>

---

 src/mesa/drivers/dri/i965/brw_fs_generator.cpp |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index cee7c68..139d1dd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1505,7 +1505,7 @@ fs_generator::generate_set_sample_id(fs_inst *inst,
           src0.type == BRW_REGISTER_TYPE_UD);
 
    struct brw_reg reg = stride(src1, 1, 4, 0);
-   if (dispatch_width == 8) {
+   if (devinfo->gen >= 8 || dispatch_width == 8) {
       brw_ADD(p, dst, src0, reg);
    } else if (dispatch_width == 16) {
       brw_push_insn_state(p);