Mesa (master): i965/fs: Drop offset_reg temporary in ssbo load

[Kristian Høgsberg]

Module: Mesa
Branch: master
Commit: feff21d1a6ba49a0d6f7526e1ff473a0b574c92e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=feff21d1a6ba49a0d6f7526e1ff473a0b574c92e

Author: Kristian Høgsberg Kristensen <krh at bitplanet.net>
Date:   Wed Oct 21 22:49:14 2015 -0700

i965/fs: Drop offset_reg temporary in ssbo load

Now that we don't read each component one-by-one, we don't need the
temoprary vgrf for the offset. More importantly, this register was type
UD while the nir source was type D. This broke copy propagation and left
a redundant MOV in the generated code.

Reviewed-by: Francisco Jerez <currojerez at riseup.net>
Signed-off-by: Kristian Høgsberg Kristensen <krh at bitplanet.net>

---

 src/mesa/drivers/dri/i965/brw_fs_nir.cpp |    8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 00f200a..a82c616 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1521,13 +1521,11 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
       }
 
       /* Get the offset to read from */
-      fs_reg offset_reg = vgrf(glsl_type::uint_type);
-      unsigned const_offset_bytes = 0;
+      fs_reg offset_reg;
       if (has_indirect) {
-         bld.MOV(offset_reg, get_nir_src(instr->src[1]));
+         offset_reg = get_nir_src(instr->src[1]);
       } else {
-         const_offset_bytes = instr->const_index[0];
-         bld.MOV(offset_reg, fs_reg(const_offset_bytes));
+         offset_reg = fs_reg(instr->const_index[0]);
       }
 
       /* Read the vector */