Mesa (master): vc4: Add QIR/QPU support for the 8-bit vector instructions.

Eric Anholt anholt at kemper.freedesktop.org
Fri Oct 23 17:12:52 UTC 2015


Module: Mesa
Branch: master
Commit: 8e701fda499af0387f5c72f7bc14510182738647
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e701fda499af0387f5c72f7bc14510182738647

Author: Eric Anholt <eric at anholt.net>
Date:   Thu Jan  8 18:07:15 2015 -0800

vc4: Add QIR/QPU support for the 8-bit vector instructions.

---

 src/gallium/drivers/vc4/vc4_program.c  |   20 ++++++++++++++++++++
 src/gallium/drivers/vc4/vc4_qir.c      |   10 ++++++++++
 src/gallium/drivers/vc4/vc4_qir.h      |   10 ++++++++++
 src/gallium/drivers/vc4/vc4_qpu_emit.c |    5 +++++
 4 files changed, 45 insertions(+)

diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index b931870..5d7564b 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -1040,6 +1040,26 @@ ntq_emit_alu(struct vc4_compile *c, nir_alu_instr *instr)
                 *dest = ntq_emit_ubfe(c, src[0], src[1], src[2]);
                 break;
 
+        case nir_op_usadd_4x8:
+                *dest = qir_V8ADDS(c, src[0], src[1]);
+                break;
+
+        case nir_op_ussub_4x8:
+                *dest = qir_V8SUBS(c, src[0], src[1]);
+                break;
+
+        case nir_op_umin_4x8:
+                *dest = qir_V8MIN(c, src[0], src[1]);
+                break;
+
+        case nir_op_umax_4x8:
+                *dest = qir_V8MAX(c, src[0], src[1]);
+                break;
+
+        case nir_op_umul_unorm_4x8:
+                *dest = qir_V8MULD(c, src[0], src[1]);
+                break;
+
         default:
                 fprintf(stderr, "unknown NIR ALU inst: ");
                 nir_print_instr(&instr->instr, stderr);
diff --git a/src/gallium/drivers/vc4/vc4_qir.c b/src/gallium/drivers/vc4/vc4_qir.c
index d7da63b..e7d0d66 100644
--- a/src/gallium/drivers/vc4/vc4_qir.c
+++ b/src/gallium/drivers/vc4/vc4_qir.c
@@ -40,6 +40,11 @@ static const struct qir_op_info qir_op_info[] = {
         [QOP_FSUB] = { "fsub", 1, 2 },
         [QOP_FMUL] = { "fmul", 1, 2 },
         [QOP_MUL24] = { "mul24", 1, 2 },
+        [QOP_V8MULD] = {"v8muld", 1, 2 },
+        [QOP_V8MIN] = {"v8min", 1, 2 },
+        [QOP_V8MAX] = {"v8max", 1, 2 },
+        [QOP_V8ADDS] = {"v8adds", 1, 2 },
+        [QOP_V8SUBS] = {"v8subs", 1, 2 },
         [QOP_FMIN] = { "fmin", 1, 2 },
         [QOP_FMAX] = { "fmax", 1, 2 },
         [QOP_FMINABS] = { "fminabs", 1, 2 },
@@ -173,6 +178,11 @@ qir_is_mul(struct qinst *inst)
         switch (inst->op) {
         case QOP_FMUL:
         case QOP_MUL24:
+        case QOP_V8MULD:
+        case QOP_V8MIN:
+        case QOP_V8MAX:
+        case QOP_V8ADDS:
+        case QOP_V8SUBS:
                 return true;
         default:
                 return false;
diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h
index fa9f5f6..fce24cd 100644
--- a/src/gallium/drivers/vc4/vc4_qir.h
+++ b/src/gallium/drivers/vc4/vc4_qir.h
@@ -67,6 +67,11 @@ enum qop {
         QOP_FADD,
         QOP_FSUB,
         QOP_FMUL,
+        QOP_V8MULD,
+        QOP_V8MIN,
+        QOP_V8MAX,
+        QOP_V8ADDS,
+        QOP_V8SUBS,
         QOP_MUL24,
         QOP_FMIN,
         QOP_FMAX,
@@ -563,6 +568,11 @@ QIR_ALU1(MOV)
 QIR_ALU2(FADD)
 QIR_ALU2(FSUB)
 QIR_ALU2(FMUL)
+QIR_ALU2(V8MULD)
+QIR_ALU2(V8MIN)
+QIR_ALU2(V8MAX)
+QIR_ALU2(V8ADDS)
+QIR_ALU2(V8SUBS)
 QIR_ALU2(MUL24)
 QIR_ALU1(SEL_X_0_ZS)
 QIR_ALU1(SEL_X_0_ZC)
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c
index adf3a8b..4c81deb 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_emit.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c
@@ -203,6 +203,11 @@ vc4_generate_code(struct vc4_context *vc4, struct vc4_compile *c)
                         A(NOT),
 
                         M(FMUL),
+                        M(V8MULD),
+                        M(V8MIN),
+                        M(V8MAX),
+                        M(V8ADDS),
+                        M(V8SUBS),
                         M(MUL24),
                 };
 




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