Mesa (master): radeonsi: Add FLUSH_AND_INV_CB_DATA_TS for DCC.

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 81ebd6a88289663677ebb97f788afb53fb84dfd5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=81ebd6a88289663677ebb97f788afb53fb84dfd5

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Wed Oct 21 00:10:38 2015 +0200

radeonsi: Add FLUSH_AND_INV_CB_DATA_TS for DCC.

Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/radeonsi/si_state_draw.c |   11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 822e2d5..cf0891a 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -647,6 +647,17 @@ void si_emit_cache_flush(struct si_context *si_ctx, struct r600_atom *atom)
 			         S_0085F0_CB5_DEST_BASE_ENA(1) |
 			         S_0085F0_CB6_DEST_BASE_ENA(1) |
 			         S_0085F0_CB7_DEST_BASE_ENA(1);
+
+		/* Necessary for DCC */
+		if (sctx->chip_class >= VI) {
+			radeon_emit(cs, PKT3(PKT3_EVENT_WRITE_EOP, 4, 0) | compute);
+			radeon_emit(cs, EVENT_TYPE(V_028A90_FLUSH_AND_INV_CB_DATA_TS) |
+			                EVENT_INDEX(5));
+			radeon_emit(cs, 0);
+			radeon_emit(cs, 0);
+			radeon_emit(cs, 0);
+			radeon_emit(cs, 0);
+		}
 	}
 	if (sctx->flags & SI_CONTEXT_FLUSH_AND_INV_DB) {
 		cp_coher_cntl |= S_0085F0_DB_ACTION_ENA(1) |