Mesa (master): gallium/svga: Enable PIPE_FORMAT_L8_UNORM for vgpu10

[Thomas Hellstrom]

Module: Mesa
Branch: master
Commit: edfb7ed1099cc8b6bebc2f1cb0b7b71bdcdbedeb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=edfb7ed1099cc8b6bebc2f1cb0b7b71bdcdbedeb

Author: Thomas Hellstrom <thellstrom at vmware.com>
Date:   Mon Sep 14 23:40:07 2015 -0700

gallium/svga: Enable PIPE_FORMAT_L8_UNORM for vgpu10

It's extensively used by XA for a8- and planar yuv component surfaces.
This fixes broken XA yuv blits using vgpu10 contexts.

Signed-off-by: Thomas Hellstrom <thellstrom at vmware.com>
Reviewed-by: Brian Paul <brianp at vmware.com>

---

 src/gallium/drivers/svga/svga_format.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/svga/svga_format.c b/src/gallium/drivers/svga/svga_format.c
index 67f6e51..28b8064 100644
--- a/src/gallium/drivers/svga/svga_format.c
+++ b/src/gallium/drivers/svga/svga_format.c
@@ -56,7 +56,7 @@ static const struct vgpu10_format_entry format_conversion_table[] =
    { PIPE_FORMAT_B4G4R4A4_UNORM,        SVGA3D_FORMAT_INVALID,      SVGA3D_A4R4G4B4,             0 },
    { PIPE_FORMAT_B5G6R5_UNORM,          SVGA3D_FORMAT_INVALID,      SVGA3D_B5G6R5_UNORM,         0 },
    { PIPE_FORMAT_R10G10B10A2_UNORM,     SVGA3D_R10G10B10A2_UNORM,   SVGA3D_R10G10B10A2_UNORM,    0 },
-   { PIPE_FORMAT_L8_UNORM,              SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
+   { PIPE_FORMAT_L8_UNORM,              SVGA3D_FORMAT_INVALID,      SVGA3D_LUMINANCE8,           0 },
    { PIPE_FORMAT_A8_UNORM,              SVGA3D_FORMAT_INVALID,      SVGA3D_A8_UNORM,             0 },
    { PIPE_FORMAT_I8_UNORM,              SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },
    { PIPE_FORMAT_L8A8_UNORM,            SVGA3D_FORMAT_INVALID,      SVGA3D_FORMAT_INVALID,       0 },