Mesa (master): freedreno/ir3: use (ss) instead of (sy) for ldlv

Rob Clark robclark at kemper.freedesktop.org
Wed Apr 13 18:38:23 UTC 2016


Module: Mesa
Branch: master
Commit: dd70945e09a348c3aa54675c65c40a284e78c362
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd70945e09a348c3aa54675c65c40a284e78c362

Author: Rob Clark <robclark at freedesktop.org>
Date:   Mon Apr 11 12:57:31 2016 -0400

freedreno/ir3: use (ss) instead of (sy) for ldlv

Fixes a bunch of flat-varying fail on a4xx (where we need to use ldlv to
read the un-interpolated varying).

Signed-off-by: Rob Clark <robclark at freedesktop.org>

---

 src/gallium/drivers/freedreno/ir3/ir3_legalize.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
index 77cd0e6..7a49f4c 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_legalize.c
@@ -183,7 +183,13 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
 			ctx->has_samp = true;
 			regmask_set(&needs_sy, n->regs[0]);
 		} else if (is_load(n)) {
-			regmask_set(&needs_sy, n->regs[0]);
+			/* seems like ldlv needs (ss) bit instead??  which is odd but
+			 * makes a bunch of flat-varying tests start working on a4xx.
+			 */
+			if (n->opc == OPC_LDLV)
+				regmask_set(&needs_ss, n->regs[0]);
+			else
+				regmask_set(&needs_sy, n->regs[0]);
 		}
 
 		/* both tex/sfu appear to not always immediately consume




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