Mesa (vulkan): 225 new commits

Jason Ekstrand jekstrand at kemper.freedesktop.org
Thu Apr 14 03:39:00 UTC 2016


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=12f88ba32a14ea79134f4e995a55149f078a2f27
Merge: 79fbec3 171a570
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Apr 13 20:25:39 2016 -0700

    Merge remote-tracking branch 'public/master' into vulkan

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=171a570f388b2895d14f6d5418c99573cffd6369
Author: Michel Dänzer <michel.daenzer at amd.com>
Date:   Wed Apr 13 15:57:50 2016 +0900

    clover: Fix build against LLVM SVN >= r266163
    
    createInternalizePass now takes a callback instead of a StringSet.
    
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b63a98b1211d22f759ae9c80b2270fe2d3b2639e
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 14:26:11 2016 -0700

    nir/dead_variables: Configurably work with any variable mode
    
    The old version of the pass only worked on globals and locals and always
    left inputs, outputs, uniforms, etc. alone.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=505a8fbdf8f2b6d2aaab5a04244cd3329f9dbe97
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Apr 12 02:30:25 2016 -0700

    i965: Switch to NIR for ldexp lowering.
    
    The old GLSL IR based lowering doesn't quite work right in all cases,
    and fails several dEQP-GLES31 and Vulkan CTS tests.  Jason's new
    approach in NIR passes all the tests.  There's not likely to be a ton
    of advantage to lowering early in GLSL IR anyway, so...switch.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4455bfa9a0cc53a3c7e3c171b022cbe6d6dcdff8
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 12:12:38 2016 -0700

    nir/algebraic: Add lowering for ldexp
    
    The algorithm used is different from both the naive suggestion from the
    GLSL spec and the one used in GLSL IR today.  Unfortunately, the GLSL IR
    implementation that we have today doesn't handle denormals (for those that
    care) or the case where the float source is +-inf.
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=765dd6534937e125b95c7998862b1a4ec76a22d8
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 11:17:53 2016 -0700

    i965: Implement the new imod and irem opcodes
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=745b3d295e0c432b95d43f979c74f9e91baaf6de
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 11:13:40 2016 -0700

    nir: Add more modulus opcodes
    
    These are all needed for SPIR-V
    
    Reviewed-by: Rob Clark <robdclark at gmail.com>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d880c6f9f59dac7cfe33713fff1c09c63ab7fb4f
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Nov 25 09:12:37 2015 -0800

    i965/vec4: Inline get_pull_constant_offset
    
    It's not really doing enough anymore to justify a helper function.
    
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>
    Reveiewed-by: Kristian Høgsberg <krh at bitplanet.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd616cab0154c24a5ac274acd98ab12f52079d5d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Apr 11 13:43:27 2016 -0700

    nir/lower_io: Allow for a full bitmask of modes
    
    Acked-by: Eric Anholt <eric at anholt.net>
    Reviewed-by: Rob Clark <robdclark at gmail.com>
    Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2caaf0ac5e0266c69e64309af9307e422e48b44d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Apr 11 13:38:02 2016 -0700

    nir/lower_indirect: nir_variable_mode is now a bitfield
    
    Acked-by: Eric Anholt <eric at anholt.net>
    Reviewed-by: Rob Clark <robdclark at gmail.com>
    Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ffa0e12e15bdfd0116446bfc5697e9e250770981
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Apr 11 13:32:59 2016 -0700

    nir: Convert nir_variable_mode to a bitfield
    
    There are several passes where we need to specify some set of variable
    modes that the pass needs top operate on.  This lets us easily do that.
    
    Acked-by: Eric Anholt <eric at anholt.net>
    Reviewed-by: Rob Clark <robdclark at gmail.com>
    Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f69a61b1aa7f7fc8dd190cb3d5da1e7bca7de809
Author: George Kyriazis <george.kyriazis at intel.com>
Date:   Wed Apr 13 10:48:55 2016 -0500

    gallium/swr: Make flat shading tris work.
    
    - Incorporate flatshade flag into the shader generation
    - Use provoking vertex (vc) in shader when flat shading.
    
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c53a12fedc519a179dd815586f432df7c7180732
Author: Rob Clark <robclark at freedesktop.org>
Date:   Tue Apr 12 16:06:17 2016 -0400

    Revert "freedreno/a4xx: better occlusion/sample counting"
    
    This reverts commit 62fa868728c729152af0d7cecd1d3e47e831cb7d.
    
    dEQP-GLES3.functional.occlusion_query.* was unhappy about that change.
    Still not really sure *what* the other slots in the sample results
    buffer are.
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=46e9bbc9182243c4599aa7dc811d404a18833cd7
Author: Rob Clark <robclark at freedesktop.org>
Date:   Tue Apr 12 14:51:33 2016 -0400

    freedreno/a4xx: rasterizer_discard support
    
    This one is slightly annoying, since trying to write RBRC from draw
    would clobber values set in the tiling/gmem code.  We could do command-
    stream patching for RBRC, as is done on a3xx.  Although since it seems
    to be a rarely used feature, it is easier just to do RMW to set/clear
    the bit.
    
    Fixes dEQP-GLES3.functional.rasterizer_discard.basic.write_depth_triangles
    and related tests.
    
    a3xx still needs the same feature, although there it probably makes more
    sense to take advantage of the existing cmdstream patching which is
    required for RBRC for other reasons.
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=216225ce57de3987aefc2c052eebe54b9c312bc0
Author: Rob Clark <robclark at freedesktop.org>
Date:   Tue Apr 12 13:56:41 2016 -0400

    freedreno/ir3: fix array textures on a4xx
    
    Seems like a4xx needs offset added to array index for all arrays,
    whereas a3xx only for cubemap arrays.  Fixes a whole swath of dEQP fails
    (roughly *sampler2darray*).
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e93b26b5d9f926346fb3651c0094fc1caade4d8
Author: Rob Clark <robclark at freedesktop.org>
Date:   Tue Apr 12 12:11:07 2016 -0400

    freedreno: fix stream-out offset handling for lines/tris
    
    We need to increment offset by # of vertices, not by # of prims.  Fixes
    a bunch of dEQP fails involving prims other than points.  For example,
    dEQP-GLES3.functional.transform_feedback.position.lines_separate
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ca6e80f61d4fc2e88f1abc2416b1965ecf1d114
Author: Rob Clark <robclark at freedesktop.org>
Date:   Tue Apr 12 11:30:31 2016 -0400

    freedreno: fix handling for stream-out offsets
    
    If changed && append, we shouldn't be resetting the internal offset back
    to zero.  This fixes issues w/ sequences like:
    
       glBeginTransformFeedback()
       glDraw()
       glPauseTransformFeedback()
       glDraw()
       glResumeTransformFeedback()
       glDraw()
       glEndTransformFeedback()
    
    Fixes dEQP-GLES3.functional.transform_feedback.array.separate.points.lowp_vec3
    and related tests.
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a4b0fc3154f4e3f926dcd5f2effe199c9fc6754
Author: Rob Clark <robclark at freedesktop.org>
Date:   Mon Apr 11 20:53:13 2016 -0400

    freedreno: fix prims-emitted query
    
    This should only count when TF is not paused.
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a7eb12d089e1a7f8a311c46aa6aed5dccdeb04ec
Author: Rob Clark <robclark at freedesktop.org>
Date:   Mon Apr 11 17:46:08 2016 -0400

    freedreno: fix max-line-width
    
    dEQP noticed that we were advertising completely bogus values.  The
    actual maximum is 127.0f.
    
    *But* we have to use an artifically low maximum to work around a bug
    in the dEQP test, which gets confused when the max line width is too
    large and lines start going off-screen.
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6bf462a1abf4bff3ad9adeeb5cb8a552db939f8f
Author: Rob Clark <robclark at freedesktop.org>
Date:   Mon Apr 11 17:55:37 2016 -0400

    freedreno: add flag to enable dEQP hacks
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f68f6c02466f89decb02e8373c7c3b46a72a621f
Author: Rob Clark <robclark at freedesktop.org>
Date:   Mon Apr 11 13:03:51 2016 -0400

    freedreno/ir3: hack to avoid getting stuck in a loop
    
    There are still some edge cases which result in a neighbor-loop.  Which
    needs to be fixed, but this hack at least makes deqp tests finish.
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd70945e09a348c3aa54675c65c40a284e78c362
Author: Rob Clark <robclark at freedesktop.org>
Date:   Mon Apr 11 12:57:31 2016 -0400

    freedreno/ir3: use (ss) instead of (sy) for ldlv
    
    Fixes a bunch of flat-varying fail on a4xx (where we need to use ldlv to
    read the un-interpolated varying).
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b35ad6e7016a877def4b3d2d22b3a2265a68e2eb
Author: Rob Clark <robclark at freedesktop.org>
Date:   Thu Apr 7 12:53:07 2016 -0400

    freedreno/ir3: cleanup double cmps.s from frontend
    
    Since we cannot mov into a predicate register, the frontend uses a
    'cmps.s p0.x, cond, 0' as a stand-in for mov to p0.x.  It does this
    since it has no way to know that the source cond instruction (ie.
    for a kill, br, etc) will only be used to write the predicate reg.
    Detect this, and re-write the instruction writing p0.x to skip the
    original cmps.[sfu].  (It is done like this, rather than re-writing
    the dest of the first cmps.[sfu] in case the first cmps.[sfu]
    actually has other users.)
    
    Signed-off-by: Rob Clark <robclark at freedesktop.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bac27dbf92d32cd8685868d21d0317a5a56f333
Author: Matt Turner <mattst88 at gmail.com>
Date:   Tue Apr 12 15:26:06 2016 -0700

    glsl: Rename "vertex_input_slots" -> "is_vertex_input"
    
    vertex_input_slots would be an appropriate name for an integer, but not
    a bool.
    
    Also remove a cond ? true : false from a count_attribute_slots() call
    site, noticed during the rename.
    
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>
    Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9586468c03ba9d0c488882eba1d870acd7adfd9e
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Wed Apr 13 15:41:55 2016 +0100

    gallivm: Workaround LLVM PR 27332.
    
    The credit for finding and isolating this bug goes to Vinson and Roland.
    
    The buggy LLVM versions were found by doing
    
      opt -instcombine llvm-pr27332.ll > /dev/null
    
    where llvm-pr27332.ll is the IR from
    https://llvm.org/bugs/show_bug.cgi?id=27332#c3
    
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd0a296895e9cf20399d038e9232d3d3b3fcc355
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Apr 13 17:27:02 2016 +0200

    gallium/radeon: move a comment to the correct place
    
    trivial

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e9a2bb44aa7b317919793f2320bd995ff373bbb
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Apr 13 09:11:44 2016 -0500

    radeonsi: gate PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT by LLVM version
    
    Otherwise we incorrectly claim ARB_ssbo support even with older LLVM versions.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94917
    Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f04565c876b7d04a50da60ce658b2cc00dd5a140
Author: Elie TOURNIER <tournier.elie at gmail.com>
Date:   Sat Apr 9 15:48:13 2016 +0200

    doxygen: Generate Doxygen for NIR
    
    Now, one can do the following to generate and read the nir Doxygen:
    cd $MESA_TOP/doxygen
    make
    firefox nir/index.html
    
    Update v2:
    Correct TAGFILES in nir.doxy
    
    Signed-off-by: Elie TOURNIER <tournier.elie at gmail.com>
    Reviewed-by: Rhys Kidd <rhyskidd at gmail.com>
    
    [Emil Velikov] v3: Rebase.
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3157df58d03790f63ad78f2e4fc11944bf51bf2a
Author: Elie TOURNIER <tournier.elie at gmail.com>
Date:   Thu Apr 7 23:21:21 2016 +0200

    doxygen: update glsl link
    
    Signed-off-by: Elie TOURNIER <tournier.elie at gmail.com>
    Reviewed-by: Rhys Kidd <rhyskidd at gmail.com>
    Tested-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e9fc1228acf14b5d223b55a9d6fc37ed2596319
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:26 2016 -0400

    doxygen: Remove deprecated settings in common.doxy
    
    These Doxygen features are deprecated, as reported by Doxygen 1.8.9.1
    
    Warning: Tag `USE_WINDOWS_ENCODING' at line 66 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    Warning: Tag `DETAILS_AT_TOP' at line 157 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    Warning: Tag `HTML_ALIGN_MEMBERS' at line 616 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    Warning: Tag `XML_SCHEMA' at line 848 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    Warning: Tag `XML_DTD' at line 854 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    Warning: Tag `MAX_DOT_GRAPH_WIDTH' at line 1115 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    Warning: Tag `MAX_DOT_GRAPH_HEIGHT' at line 1123 of file `common.doxy' has become obsolete.
             To avoid this warning please remove this line from your configuration file or upgrade it using "doxygen -u"
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d18ab72bf9272b2e22037035f4a0ba36dbe5b4e
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:25 2016 -0400

    doxygen: Fix typo in doxygen/tnl.doxy
    
    TAGFILE relative folder should match .tag file
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ba409a364ee5652ecae265ce82c65b64e774a80
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:24 2016 -0400

    doxygen: Correct TAGFILE linkage of main
    
    core.doxy was renamed to main.doxy, along with output folder in
    the below 2004 commit.
    
    Correct the other modules' TAGFILE linkage to find the main folder.
    
      commit 3ef972f538e1ff207f5919a8068bf14af18fb270
      Author: Brian Paul <brian.paul at tungstengraphics.com>
      Date:   Sun May 16 22:07:02 2004 +0000
    
          Replaced 'core' with 'main'.
          Other minor updates.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7703a3e3d0079afc10b3048e8bd9d1986a7f3003
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:23 2016 -0400

    doxygen: Update .gitignore
    
    The last of these output directories was removed in 2007.
    
      commit c2e0570831ae130fce1fa374bebe25bb9c561e29
      Author: Jerome Glisse <glisse at freedesktop.org>
      Date:   Fri Feb 16 23:18:56 2007 +0100
    
          Update doxygen doc to reflet vbo changes.
    
          Update doxygen doc, array_cache no longuer exist,
          new shiny vbo modules is there. Tested on unix,
          but i think i didn't broke that bat :).
    
      commit 3ef972f538e1ff207f5919a8068bf14af18fb270
      Author: Brian Paul <brian.paul at tungstengraphics.com>
      Date:   Sun May 16 22:07:02 2004 +0000
    
          Replaced 'core' with 'main'.
          Other minor updates.
    
      commit 69db632a9df035cdc852cc64fb14038919929a70
      Author: Jose Fonseca <j_r_fonseca at yahoo.co.uk>
      Date:   Thu May 1 23:32:54 2003 +0000
    
          Move the Doxygen configuration files into the usual places and integrate with the build system.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ced18f4d609f7c027de2f304fdf89de7c48af21d
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:22 2016 -0400

    doxygen: Remove references to miniglx
    
    miniglx was removed in February 2010. Clean up remaining
    unnecessary doxygen references.
    
      commit a9e36696837b2c31ecee4017a0adffbd987c1eff
      Author: Kristian Høgsberg <krh at bitplanet.net>
      Date:   Thu Feb 25 16:17:04 2010 -0500
    
          Remove remaining miniglx references
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=29b805b929ea2be9aa916d48a356fb9ea440e50f
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:21 2016 -0400

    doxygen: Fix doxygen/gbm.doxy TAGFILES
    
    There has never been a doxygen/gbm_setup output folder.
    
    Appears to have been a copy-paste error from original commit
    in 245341f406bbdf23fec3d8ea8ad95c147c11ad1c.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=684e7a4a143a5ff021893aa4df7569328452fabe
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:20 2016 -0400

    doxygen: Correct TAGFILE relative paths
    
    Per Doxygen documentation, to combine external documentation (stored in
    a *.tag file) with a project the TAGFILES option should be set in the
    configuration file.
    
      A tag file typically only contains a relative location of the
      documentation from the point where doxygen was run. So when
      you include a tag file in other project you have to specify
      where the external documentation is located in relation this
      project.
    
      You can do this in the configuration file by assigning the
      (relative) location to the tag files specified after the
      TAGFILES configuration option.
    
      If you use a relative path it should be relative with respect
      to the directory where the HTML output of your project is
      generated; so a relative path from the HTML output directory
      of a project to the HTML output of the other project that is
      linked to.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f066fb529bf05bfd839f6c1dcb476c860afa1bbd
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:19 2016 -0400

    doxygen: Fix doxygen/glapi.doxy
    
    The src/mesa/glapi folder was relocated in the below commit.
    Amend the doxygen/glapi.doxy INPUT setting accordingly.
    
    Whilst here, in addition this change also avoids a bug in the
    consolidated Doxygen output caused by doxygen/glapi.doxy inadvertently
    overwriting doxygen/swrast.tag via its GENERATE_TAGFILE setting.
    
    This bug depended upon the specific order each *.tag was built.
    
       commit 296adbd545b8efd38c9ed508166b2de2764a444b
       Author: Chia-I Wu <olv at lunarg.com>
       Date:   Mon Apr 26 12:56:44 2010 +0800
    
           glapi: Move to src/mapi/.
    
           Move glapi to src/mapi/{glapi,es1api,es2api}.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf3bc91c063e71f7458d2e5645a8da87d2b0eaf4
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Apr 9 16:43:18 2016 -0400

    doxygen: Remove src/mesa/shader/ references
    
    Mesa has not had a src/mesa/shader/ folder since Mesa 7.9 removed it
    in October 2010, as part of a revised GLSL compiler written by Intel.
    
    Remove doxygen/shader.doxy and consequential changes made throughout.
    
    In addition to removing an unnecessary Doxygen doxyfile, this change also
    avoids a bug in the consolidated Doxygen output caused by
    doxygen/shader.doxy inadvertently overwriting doxygen/swrast.tag via its
    GENERATE_TAGFILE setting.
    
    This bug depended upon the specific order each *.tag was built.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Acked-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=04f15e491f8ecd0bce59e2de5e501ed3fd157c62
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Apr 11 17:54:51 2016 +0200

    gallium/radeon: add an env variable to force a level of aniso filtering
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc5d8b678e098963e76ec7e8ccaa87c9fbf95674
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Wed Apr 13 11:07:45 2016 +0100

    llvmpipe: Test rounding of x.5.
    
    Leverage nearbyintif function, which should be available on all C99
    implementations.
    
    Trivial.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb438d8b3e1e32faf714f22b308c8f9c5506209b
Author: Roland Scheidegger <sroland at vmware.com>
Date:   Wed Apr 13 05:00:03 2016 +0200

    gallivm: use llvm.nearbyint instead of llvm.round.
    
    We used to use sse roundps intrinsic directly, but switched to use the llvm
    intrinsics for rounding with e4f01da15d8c6ce3e8c77ff3ff3d2ce2574a3f7b.
    However, llvm semantics follows standard math lib round function which is
    specced to do roundNearestAwayFromZero but we really want roundNearestEven
    (moreoever, using round generates atrocious code since the cpu can't do it
    directly and it results in scalar calls to libm __roundf).
    So, use llvm.nearbyint instead, which does exactly the right thing, and even
    has the advantage of being available with llvm 3.3 too. (I've verified it
    actually generates a roundps instruction with llvm 3.3.)
    
    This fixes https://bugs.freedesktop.org/show_bug.cgi?id=94909
    
    Reviewed-by: Jose Fonseca <jfonseca at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f525db6358fbaa7b4296d2e6484e0b1ae703ac78
Author: Pierre Moreau <pierre.morrow at free.fr>
Date:   Fri Mar 18 01:17:31 2016 +0100

    nv50/ra: `isinf()` is in namespace `std` since C++11.
    
    This fixes a compile error while building Nouveau with C++11 enabled (and
    glibc >= 2.23). This happens if SWR is enabled, as it forces C++11.
    
    Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
    Signed-off-by: Jose Fonseca <jfonseca at vmware.com>
    
    https://bugs.freedesktop.org/show_bug.cgi?id=94907

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa46848e51a619aba5a748316fe8fe4c2e17d243
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Sat Apr 9 20:26:42 2016 +0100

    scons: Allow building with Address Sanitizer.
    
    libasan is never linked to shared objects (which doesn't go well with
    -z,defs).  It must either be linked to the main executable, or (more
    practically for OpenGL drivers) be pre-loaded via LD_PRELOAD.
    
    Otherwise works.
    
    I didn't find anything with llvmpipe.  I suspect the fact that the
    JIT compiled code isn't instrumented means there are lots of errors it
    can't catch.
    
    But for non-JIT drivers, the Address/Leak Sanitizers seem like a faster
    alternative to Valgrind.
    
    Usage (Ubuntu 15.10):
    
       scons asan=1 libgl-xlib
       export LD_LIBRARY_PATH=$PWD/build/linux-x86_64-debug/gallium/targets/libgl-xlib
       LD_PRELOAD=libasan.so.2 any-opengl-application
    
    Acked-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1c89f60050fa5acd0bd1faa993de902631482a0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Apr 12 15:23:47 2016 -0700

    mesa: Change an error code in glSamplerParameterI[iu]v().
    
    This is supposed to be INVALID_OPERATION in ES.  We already did this
    for the fv/iv variants, but not Iiv/Iuv, which are new in ES 3.2 (or
    extensions).
    
    Fixes:
    ES31-CTS.texture_border_clamp.samplerparameteri_non_gen_sampler_error
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=46bfcd61f5ca81fc7e19f0d74ee9fa70f16e9df7
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Tue Apr 12 17:03:52 2016 +0100

    softpipe: Free tgsi.image elements on context destruction.
    
    Courtesy of address sanitizer.
    
    [airlied: free buffers as well]
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a3d928e2cd8eeb4776c732cab5c0fce9d593ea2
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Sun Apr 10 17:41:30 2016 +1000

    softpipe: Enable ARB_framebuffer_no_attachments
    
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b63301d9fff43119359eaeb34f80426919f0b4a
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Dec 12 15:17:53 2014 -0800

    vc4: Work around hardware limits on the number of verts in a single draw.
    
    Fixes rendering failures in glmark2's refract and
    bump:render-mode=high-poly demos, and partially in its terrain demo.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d6525a377250865cc6baa2c9cd5c6c0b6cd3f9c
Author: Thomas Hindoe Paaboel Andersen <phomes at gmail.com>
Date:   Wed Apr 13 03:06:06 2016 +0200

    softpipe: avoid buffer overflow
    
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b89708f95fafc458cc79bc210407b723a0f0f78c
Author: Thomas Hindoe Paaboel Andersen <phomes at gmail.com>
Date:   Wed Apr 13 03:06:05 2016 +0200

    tgsi: fix buffer overflow
    
    Increase r to four channels as rgba is written to it
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9294bc3452737914e2528775b3ae2099ab74110
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Apr 1 19:58:29 2016 -0500

    swr: handle pci cap requests
    
    Reviewed-by: George Kyriazis <george.kyriazis at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b19d214b238228bfebfe3869b6aee540993fe706
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 30 22:40:25 2016 -0500

    swr: support samplers in vertex shaders
    
    Reviewed-by: George Kyriazis <george.kyriazis at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=10cfd7a6045ffbfd0debf66d2dfd2caeeb559951
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Thu Mar 17 19:53:36 2016 -0500

    radeonsi: enable GLSL 4.20 and therefore OpenGL 4.2
    
    This is the last necessary bit for OpenGL 4.2 support. All driver-specific
    functionality has already been implemented as part of extensions.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=047e3264f67bc54365be7b0e163b6910a9e9de3a
Author: Iurie Salomov <iurcic at gmail.com>
Date:   Tue Apr 12 23:24:30 2016 +0100

    va: check null context in vlVaDestroyContext
    
    Signed-off-by: Iurie Salomov <iurcic at gmail.com>
    Reviewed-by: Julien Isorce <j.isorce at samsung.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f3b516f2e9e3066792fe244351427f8775ce214
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Apr 11 14:46:14 2016 -0700

    nir/clone: Copy bit size when cloning registers
    
    Reported-by: Mark Janes <mark.a.janes at intel.com>
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e70a58af394a8699aecdaad6e406a9183ce2090
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Apr 12 23:39:42 2016 +0200

    radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added
    
    For some reason unknown to me, SI hangs if the event is written after
    CONTEXT_CONTROL.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=95d622e16df0ddbf52e43a34bd6ed6dd15e3bdee
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sun Apr 3 02:02:12 2016 -0700

    glsl: Don't copy propagate or tree graft precise values.
    
    This is kind of a hack.  We currently track precise requirements
    by decorating ir_variables.  Propagating or grafting the RHS of an
    assignment to a precise value into some other expression tree can
    lose those decorations.
    
    In the long run, it might be better to replace these ir_variable
    decorations with an "exact" decoration on ir_expression nodes,
    similar to what NIR does.
    
    In the short run, this is probably good enough.  It preserves
    enough information for glsl_to_nir to generate "exact" decorations,
    and NIR will then handle optimizing these expressions reasonably.
    
    Fixes ES31-CTS.gpu_shader5.precise_qualifier.
    
    v2: Drop invariant handling, as it shouldn't be necessary (caught
        by Jason Ekstrand).
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ec971a9972e5343cfb28da6f48650caba0a7e50
Author: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Date:   Tue Apr 12 15:23:17 2016 -0700

    i965/tiled_memcpy: Fix rgba8_copy_16_aligned_dst() typo
    
    Copy and paste error in commit eafeb8db66dae7619ff3cb039706b990d718cba7:
    
        i965/tiled_memcpy: Unroll bytes==64 case.
    
    Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1af0f0151c6ae7d8634a642ad7a13713f395ca4d
Author: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Date:   Mon Apr 11 14:28:18 2016 -0700

    glsl/linker: Recurse on struct fields when adding shader variables
    
    ARB_program_interface_query requires that we add struct fields
    recursively down to basic types.
    
    Fixes 52 struct test cases in dEQP-GLES31.functional.program_interface_query.*
    
    Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=778fd46aa4df08f2dd5d5a9162e6dce062cc1cb6
Author: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Date:   Mon Apr 11 13:06:07 2016 -0700

    glsl/linker: Pass name and type through to create_shader_variable()
    
    No functional change here, but this now lets us recurse throught structs
    in add_shader_variable().
    
    Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=09f01215933f8f7f8d3d4cda9ff94605164df9a9
Author: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Date:   Mon Apr 11 13:03:12 2016 -0700

    glsl/linker: Pass absolute location to add_shader_variable()
    
    This lets us pass in the absolution location of a variable instead of
    computing it in add_shader_variable() based on variable location and
    bias. This is in preparation for recursing into struct variables.
    
    Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ab6aae4dcecba4e77f6777606e92cf2c2f1f83e
Author: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
Date:   Mon Apr 11 12:57:41 2016 -0700

    glsl/linker: Add add_shader_variable() helper
    
    This consolidates the combination of create_shader_variable() and
    add_program_resource() into a new helper function. No functional
    difference, but we'll expand add_shader_variable() in the next few
    commits.
    
    Signed-off-by: Kristian Høgsberg Kristensen <kristian.h.kristensen at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eafeb8db66dae7619ff3cb039706b990d718cba7
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Apr 11 11:59:59 2016 -0700

    i965/tiled_memcpy: Unroll bytes==64 case.
    
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e605d9b3af68b67dceb8eeaeabebe91bc9cf31c
Author: Roland Scheidegger <sroland at vmware.com>
Date:   Fri Jan 29 03:18:36 2016 +0100

    i965/tiled_memcpy: Provide SSE2 for RGBA8 <-> BGRA8 swizzle.
    
    The existing code uses SSSE3, and because it isn't compiled in a
    separate file compiled with that, it is usually not used (that, of
    course, could be fixed...), whereas SSE2 is always present with 64-bit
    builds.  This should be pretty much as fast as the pshufb version,
    albeit those code paths aren't really used on chips without llc in any
    case.
    
    v2: fix andnot argument order, add comments
    v3: use pshuflw/hw instead of shifts (suggested by Matt Turner), cut comments
    v4: [mattst88] Rebase
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc88b4babf86e93421e7a9da29ae125712891390
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Apr 11 11:47:21 2016 -0700

    i965/tiled_memcpy: Move SSSE3 code back into inline functions.
    
    This will make adding SSE2 code a lot cleaner.
    
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a5d8d9af42fd77fce1492d55f958da97816961a
Author: Matt Turner <mattst88 at gmail.com>
Date:   Fri Apr 8 15:30:30 2016 -0700

    i965/tiled_memcpy: Optimize RGBA -> BGRA swizzle.
    
    Replaces four byte loads and four byte stores with a load, bswap,
    rotate, store; or a movbe, rotate, store.
    
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a191e6b719848a17963f185954f1696fa5a2bcb1
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Apr 12 12:23:31 2016 -0500

    radeonsi: fix bounds check in si_create_vertex_elements
    
    This was triggered by
    dEQP-GLES3.functional.vertex_array_objects.all_attributes
    
    Cc: "11.1 11.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4285a97ceae4f5e49dc9da4be6b066c520052954
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Mon Mar 21 17:31:15 2016 -0500

    docs: mark atomic counters and SSBOs as done for radeonsi
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfd11c599600960f966d5d217b8dc20442108ef1
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 16:25:42 2016 -0500

    radeonsi: enable shader buffer pipe caps
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e81843b135827ad7e4c6771dee574a695c3b64d
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Mar 16 18:03:19 2016 -0500

    radeonsi: add shader buffer support to TGSI_OPCODE_RESQ
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=01109282ce47094f19495b9928845d4b47d9629f
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Mar 16 17:03:02 2016 -0500

    radeonsi: add shader buffer support to TGSI_OPCODE_STORE
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=745014c502bae7509828436eeade6b88c2e76834
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 19:11:38 2016 -0500

    radeonsi: add shader buffer support to TGSI_OPCODE_LOAD
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=68bc25c931ab76fc9794cb10f515e81b28e2703d
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 19:02:38 2016 -0500

    radeonsi: add shader buffer support to TGSI_OPCODE_ATOM*
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6f5d000db1963eac6fb89d18008e5375720af93
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 19:00:11 2016 -0500

    radeonsi: add offset parameter to buffer_append_args
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c565466eeaea344e379af95967999e180d29a600
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 18:47:14 2016 -0500

    radeonsi: adjust buffer_append_args to take a 128 bit resource
    
    Move the buffer resource extraction code out into its own function.
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e88018ffe5dd57e368d6c15946f014c5457bb74c
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 18:34:52 2016 -0500

    radeonsi: preload shader buffers in shaders
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c495c0ad37dc6a4505a726e3ac0e3d83adc46d30
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Mar 15 16:30:56 2016 -0500

    radeonsi: implement set_shader_buffers
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=73c8b85b6456775ab19b08b4d1f335e4f3c88dd0
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Mar 16 17:42:57 2016 -0500

    radeonsi: move resetting of constant buffers into a separate function
    
    This will be re-used for shader buffers.
    
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=35ade36c88e5aaa0b18c3cc911d9a4de3a60a80b
Author: Haixia Shi <hshi at chromium.org>
Date:   Thu Apr 7 11:05:09 2016 -0700

    dri/i965: fix incorrect rgbFormat in intelCreateBuffer().
    
    It is incorrect to assume that pixel format is always in BGR byte order.
    We need to check bitmask parameters (such as |redMask|) to determine whether
    the RGB or BGR byte order is requested.
    
    v2: reformat code to stay within 80 character per line limit.
    v3: just fix the byte order problem first and investigate SRGB later.
    v4: rebased on top of the GLES3 sRGB workaround fix.
    v5: rebased on top of the GLES3 sRGB workaround fix v2.
    
    Signed-off-by: Haixia Shi <hshi at chromium.org>
    Reviewed-by: Stéphane Marchesin <marcheu at chromium.org>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e303e88a9c86ce9b08c34919982729bf234fe995
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sun Apr 10 22:50:05 2016 -0700

    glsl: Reject illegal qualifiers on atomic counter uniforms.
    
    This fixes
    
    dEQP-GLES31.functional.uniform_location.negative.atomic_fragment
    dEQP-GLES31.functional.uniform_location.negative.atomic_vertex
    
    Both of which have lines like
    
    layout(location = 3, binding = 0, offset = 0) uniform atomic_uint uni0;
    
    The ARB_explicit_uniform_location spec makes a very tangential mention
    regarding atomic counters, but location isn't something that makes sense
    with them.
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=929e44099f83acee74d07eb3e33a3c0d22f8bc6b
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sun Apr 10 22:41:46 2016 -0700

    glsl: Add a method to print error messages for illegal qualifiers.
    
    Suggested by Timothy Arceri a while back on mesa-dev:
    https://lists.freedesktop.org/archives/mesa-dev/2016-February/107735.html
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>
    Acked-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f0854724827bd34b9e64ab0c9cabc328e404c62
Author: John Sheu <sheu at google.com>
Date:   Tue Apr 12 12:53:00 2016 -0600

    xlib: fix memory leak on Display close
    
    The XMesaVisual instances freed in the visuals table on display close
    are being freed with a free() call, instead of XMesaDestroyVisual(),
    causing a memory leak.
    
    Signed-off-by: John Sheu <sheu at google.com>
    Reviewed-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d04bb14d04d2f2f03cdaa3d78121d338a81de2e4
Author: Jakob Sinclair <sinclair.jakob at openmailbox.org>
Date:   Tue Apr 12 20:48:18 2016 +0200

    st/mesa: Replace GLvoid with void
    
    GLvoid was used before in OpenGL but it has changed to just using void.
    All GLvoids in mesa's state tracker has been changed to void in this patch.
    
    Tested this with piglit and no problems were found. No compiler warnings.
    
    Signed-off-by: Jakob Sinclair <sinclair.jakob at openmailbox.org>
    Reviewed-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=126da23d70dccd9eb5ebe7bf26cb113193f882a4
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Sun Apr 3 21:49:44 2016 +0200

    radeonsi: Mark ARB_robust_buffer_access_behavior as supported.
    
    Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=70dcd841f7d94a7b44b294d5264324fc5905aae8
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Tue Apr 12 15:00:31 2016 +0200

    gallium: Add capability for ARB_robust_buffer_access_behavior.
    
    Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=285dc05055f2f98137188692d4c924605e5a942d
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Tue Apr 12 14:57:07 2016 +0200

    mesa: Expose the ARB_robust_buffer_access_behavior extension.
    
    Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aad8707b288b03b26c1afde8b6280674e327115d
Author: Miklós Máté <mtmkls at gmail.com>
Date:   Thu Mar 24 01:12:59 2016 +0100

    main: rework the compatibility check of visuals in glXMakeCurrent
    
    Now it follows the compatibility criteria listed in section 2.1 of
    the GLX 1.4 specification.
    This is needed for post-process effects in SW:KotOR.
    
    Signed-off-by: Miklós Máté <mtmkls at gmail.com>
    Signed-off-by: Marek Olšák <marek.olsak at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=df37b06276a7298d3785e95fbe2ec9dc1ebd6c4c
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Apr 1 15:52:34 2016 -0600

    swr: [rasterizer core] warning cleanup
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=06c59dc417661cda41b50aa57656a848434acbb4
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 30 19:24:32 2016 -0600

    swr: [rasterizer] Put in rudimentary garbage collection for the global arena allocator
    
    - Check for unused blocks every few frames or every 64K draws
    - Delete data unused since the last check if total unused data is > 20MB
    
    Doesn't seem to cause a perf degridation
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b990483de21cd99a94a098bb0eb397ba86b7b2a6
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 30 15:54:48 2016 -0600

    swr: [rasterizer core] Put DRAW_CONTEXT on a diet
    
    No need for 256 pointers per DC.
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a939a58881063c092a95bd7f1426b8fae1d8a44d
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 30 14:59:40 2016 -0600

    swr: [rasterizer core] Add experimental support for hyper-threaded front-end
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a8146d0ff623ee26f17b9292176ab0a79ead374
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Mar 30 12:32:41 2016 -0600

    swr: [rasterizer] Avoid segv in thread creation on machines with non-consecutive NUMA topology.
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2c71fd4bf81b82c7c3f57fc2c97aa83e814b6883
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Mar 29 11:56:04 2016 -0600

    swr: [rasterizer core] Replace all naked OSALIGN macro uses with OSALIGNSIMD / OSALIGNLINE
    
    Future proofing
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=32a8653ad2cef2fba70b33ee62adc6f5d9d427d8
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Tue Mar 29 10:58:43 2016 -0600

    swr: [rasterizer] Ensure correct alignment of stack variables used as vectors
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1871c4459bbd291e6356e971c6aa2becf4ecb96
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Mar 25 17:24:45 2016 -0600

    swr: [rasterizer core] Quantize depth to depth buffer precision prior to depth test/write.
    
    Fixes z-fighting issues.
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2a19aca05fab2b7904b7187f85b2e421254a37e6
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 24 17:48:57 2016 -0600

    swr: [rasterizer common] win32 build fixups
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c25244f2f7f61ebb368a9651aef4de93bd8306ac
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 24 16:20:02 2016 -0600

    swr: [rasterizer core] Affinitize thread scratch space to numa node of worker
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f89f6d562aaa7d85fb5c6e9d8d98a9f20deab462
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Thu Mar 24 15:52:11 2016 -0600

    swr: [rasterizer] Misc fixes identified by static code analysis
    
    No perf loss detected
    
    Acked-by: Brian Paul <brianp at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c014782138634d5d36e1484bf498cef2b2d888f
Author: Brian Paul <brianp at vmware.com>
Date:   Mon Apr 11 18:54:28 2016 -0600

    st/mesa: fix memleak in glDrawPixels cache code
    
    If the glDrawPixels size changed, we leaked the previously cached
    texture, if there was one.  This patch fixes the reference counting,
    adds a refcount assertion check, and better handles potential malloc()
    failures.
    
    Tested with a modified version of the drawpix Mesa demo which changed
    the image size for each glDrawPixels call.
    
    Cc: "11.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: José Fonseca <jfonseca at vmware.com>
    Reviewed-by: Charmaine Lee <charmainel at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5105e67a860c6c3271ad7d48e2d80e84c3e8ade
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Tue Apr 12 07:36:06 2016 +0100

    gallium: Use STATIC_ASSERT whenever possible.
    
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b025c23cfe6069829601df46670366a2b625f245
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Tue Apr 12 07:35:38 2016 +0100

    softpipe: Use STATIC_ASSERT whenever possible.
    
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f13d7543fd272b4dd49d1389854ebcd6302694e
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Tue Apr 12 07:35:23 2016 +0100

    svga: Use STATIC_ASSERT whenever possible.
    
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7279098dc58d2d9d533900f1607aee76fcbbdab0
Author: Jose Fonseca <jfonseca at vmware.com>
Date:   Tue Apr 12 07:35:08 2016 +0100

    mesa: Use STATIC_ASSERT whenever possible.
    
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=686b018ab313e3a95931676995be0e65dc7a9b75
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 04:56:46 2016 +0200

    r600g: use common scissor and viewport code
    
    It's the same as radeonsi. This adds guard band support to r600g.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Grigori Goronzy <greg at chown.ath.cx>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=87a5b07f9013536d5a0de66ffc2d9141b02190c5
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 12:53:12 2016 +0200

    gallium/radeon: add R600/Evergreen/Cayman support to common viewport code
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Grigori Goronzy <greg at chown.ath.cx>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ca5566ed7847f5a56d055fd6530382c55012663
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 04:26:50 2016 +0200

    radeonsi: move scissor and viewport states into gallium/radeon
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Grigori Goronzy <greg at chown.ath.cx>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=db00f6cc9cdef551e1069a6d5cf6171565cc0ace
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 03:38:09 2016 +0200

    radeonsi: use guard band clipping
    
    Guard band clipping speeds up rasterization for primitives that are
    partially off-screen.  This change in particular results in small
    framerate improvements in a wide range of games.
    
    Started by Grigori Goronzy <greg at chown.ath.cx>.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Grigori Goronzy <greg at chown.ath.cx>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb21f8a97cdd5ae240aecdfa417b60b2c0dd6789
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 03:29:57 2016 +0200

    radeonsi: compute scissor from viewport in set_viewport_states
    
    and clamp it right before emitting. This is a prerequisite for computing
    the guard band.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Grigori Goronzy <greg at chown.ath.cx>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b6a0b7fc02c27c334cf932cfdfd7bedef5a5198
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Apr 11 20:24:34 2016 +0200

    gallium/radeon: set GTT WC on tiled textures
    
    Just for consistency. This should have no effect, because OpenGL textures
    always go to VRAM.
    
    Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a4b74d1ba2c156766a7a5dbfef099c7db5d6694
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Apr 11 19:56:07 2016 +0200

    gallium/radeon: relax requirements on VRAM placements on APUs
    
    This makes Tonga with vramlimit=128 2x faster in Heaven.
    
    Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a57309f807dc1e4450cd8c5ac132de0de4e17f89
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Apr 11 19:26:03 2016 +0200

    winsys/amdgpu: remove hack for low VRAM configuration
    
    A better solution will be used.
    
    Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b36f19bf98e206264b4de6ce5ca510c2d305ffe4
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 21:18:14 2016 +0200

    r600g: disable aniso filtering for non-mipmap textures on EG
    
    this is the default behavior of the closed driver when running on VI
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3bc2d967c4c626f0efadfca8771a90797a12c22b
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 02:09:59 2016 +0200

    r600g: clean up aniso state translation
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0d4469519bf07c4051af8eb86ab71647fb1eb61
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 21:37:43 2016 +0200

    radeonsi: disable aniso filtering for non-mipmap textures on SI-CI
    
    The closed driver does this, but it looks at base_level and last_level
    and uses a conditional assignment, which LLVM can't generate on SGPRs.
    
    That led me to invent this solution that abuses the image descriptor.
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ddd33431c54379ecf0dce71078e34a07be82e2fc
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 02:08:23 2016 +0200

    radeonsi: clean up aniso state translation
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7420ef5b4640a92a5aaa57341c59e0d4185a4a0
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 17:02:51 2016 +0200

    radeonsi: enable some sampler fields to match the closed driver
    
    copied from the Vulkan driver
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a98be001f06ae2d50d444d1103cc15b67502a14
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 15:34:45 2016 +0200

    gallium/radeon: fix maximum texture anisotropy setup
    
    We were overdoing it for non-power-of-two values.
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d7be5d37e70d19df88be53222bf02def40e93e6
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 22:48:48 2016 +0200

    gallium/radeon: never choose a linear tiling for DB surfaces
    
    Just for consistency. This is actually not a problem, because both addrlib
    and radeon check and fix this.
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7878146c444628e8f579d57f4c3af03ad1fc201
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 22:39:54 2016 +0200

    gallium/radeon: removing dead code for sharing stencil buffers
    
    This is a remnant of the times when the DDX was allocating depth-stencil
    buffers for windows. Now, st/dri allocates them and doesn't share them.
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=73aeebd772cfb840dee05d5815239b365d68f09e
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 17:21:19 2016 +0200

    radeonsi: allow clearing buffers >= 4 GB
    
    Only CMASK and DCC clears can use this, because only textures can be so
    large.
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1dd8832e046ddef6d9ee69210127bebc9ddb35eb
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 17:14:49 2016 +0200

    gallium/radeon: allow allocating textures >= 4 GB
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0689741e51ba38de9c865592a16da97e2dfc350a
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 16:50:17 2016 +0200

    winsys/radeon: fix printing allocation failures
    
    print as unsigned instead of signed
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ba0933f488cbb22ad1a221b0057ac9753130916
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 16:48:55 2016 +0200

    winsys/amdgpu: add support for 64-bit buffer sizes
    
    v2: fail in radeon_winsys_bo_create if size > 32 bits
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e78b5ed38e289ddb6397a211361b6e3be4bf9ab
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Sun Apr 10 16:37:33 2016 +0200

    pb_buffer: switch pb_buffer::size to 64 bits
    
    being able to allocate more than 4 GB may be useful
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e241a63512d87ee5585db9768869133f5665a1ca
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 21:26:23 2016 +0200

    gallium/radeon: remove R600_QUERY_HW_FLAG_TIMER
    
    not used anymore
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0222351fc114b9b8a34cd79598fb3f0fb4a75b0e
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 21:24:19 2016 +0200

    gallium/radeon: merge timer and non-timer query lists
    
    All of them are paused only between IBs.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7347c068d88a0bd10f27a48c6e068cf098442098
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 21:12:13 2016 +0200

    r600g: don't manually stop queries for blitter
    
    r600_set_active_query_state does it better.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=12fee5b93e06ba2e7076b9a24ddf15d55a1ac3f5
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 21:10:58 2016 +0200

    r600g: add pausing pipeline & streamout queries into set_active_query_state
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e90fe60b72c9b08a8b06f055aafc514a0ad483c4
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 20:41:52 2016 +0200

    r600g: implement set_active_query_state for pausing occlusion queries
    
    Use ZPASS_INCREMENT_DISABLE everywhere.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5248676f87bc94079321ab7fcdee888e4d3f5a4f
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 20:23:51 2016 +0200

    r600g: simplify r600_set_occlusion_query_state
    
    The caller does the same checking.
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b82893f93ab0f92dd44444e4a311fa253f423226
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 20:29:08 2016 +0200

    gallium/radeon: move pipeline stat context flags to common code
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa79a3269f7ea1d6f5f43d3e98836494b5069a0c
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 20:37:06 2016 +0200

    r600g: fix typo in r600 register definitions
    
    Acked-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4c288d8e1264b3228319f862b04ef31dbabb1a1
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 03:24:06 2016 +0200

    gallium/radeon: unify checking streamout enable state
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=466aa5718594a1188460856840be324f84553730
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 21:41:34 2016 +0200

    radeonsi: fix mask checking when emitting scissors and viewports
    
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
    Reviewed-by: Grigori Goronzy <greg at chown.ath.cx>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3eebb84ebd4c1dd7bd9b69b0b65273635443740
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Apr 7 02:59:09 2016 +0200

    radeonsi: implement and rely on set_active_query_state
    
    Reviewed-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e599b8f384b4fc48b450ed848d93e27e876de53f
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 01:43:00 2016 +0200

    gallium: pause queries for all meta ops
    
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=26171bd67e47cf25857cbce767ad048c8d99d1b0
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Fri Apr 8 01:42:00 2016 +0200

    gallium: add pipe_context::set_active_query_state for pausing queries
    
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc67375379ec26eef63f8e530724cd53c97bc3d0
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Mon Apr 11 15:53:43 2016 +0200

    radeonsi: Synchronize a streamout write after read hazard.
    
    Signed-off-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dccdb655a169a43de4427580e230f9d3706436cd
Author: Hans de Goede <hdegoede at redhat.com>
Date:   Mon Apr 11 14:07:20 2016 +0200

    nv30: Add missing PIPE_SHADER_CAP_INTEGERS to get_shader_param()
    
    Add missing PIPE_SHADER_CAP_INTEGERS for frag shaders to
    nv30_screen_get_shader_param().
    
    Signed-off-by: Hans de Goede <hdegoede at redhat.com>
    Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0e3ba61b5f8bb285472d5acda5ff233b05aeef4
Author: Haixia Shi <hshi at chromium.org>
Date:   Thu Apr 7 11:05:08 2016 -0700

    dri/i965: extend GLES3 sRGB workaround to cover all formats
    
    It is incorrect to assume BGRA byte order for the GLES3 sRGB workaround.
    
    v2: use _mesa_get_srgb_format_linear to handle all formats
    
    Signed-off-by: Haixia Shi <hshi at chromium.org>
    Reviewed-by: Stéphane Marchesin <marcheu at chromium.org>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea8a65f503f05404d923a2a076064c3ffe6660aa
Author: Eduardo Lima Mitev <elima at igalia.com>
Date:   Tue Apr 12 10:11:35 2016 +0200

    i965: Add autogenerated 'brw_nir_trig_workarounds.c' to gitignore
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=703c1e69d89df303e5fb4c1873f9b3954bdeda9c
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sun Apr 10 20:43:25 2016 -0400

    glsl: Update hash table comments in constant propagation
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=afa8707ba93a7d226a76319acda2a8dd89524db7
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Apr 11 13:02:20 2016 +1000

    softpipe: add SSBO/shader atomics support.
    
    This adds support for the features requires for ARB_shader_storage_buffer_object
    and ARB_shader_atomic_counters, ARB_shader_atomic_counter_ops.
    
    [airlied: some cleanups applied]
    Reviewed-by: Brian Paul <brianp at vmware.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2aeeca4554d744b6293ad87d9a183e51b0138ff
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Apr 11 12:59:25 2016 +1000

    draw: add support for passing buffers to vs/gs shaders.
    
    Like the image code, but for shader buffers this time.
    
    Reviewed-by: Brian Paul <brianp at vmware.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=081a958bcddd37131bd67d0ac26a0785ecbd5fa6
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Apr 11 12:54:59 2016 +1000

    tgsi: add support for buffer/atomic operations to tgsi_exec.
    
    This adds support for doing load/store/atomic operations on
    buffer objects.
    
    Reviewed-by: Brian Paul <brianp at vmware.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c7a0d188a495a247570a27bc4af77c540e40c34
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Apr 11 12:20:38 2016 +1000

    tgsi: set nonhelpermask for vertex shaders
    
    For atomic operations we really need to avoid executing unnecessary shaders, so for some
    tests that just draw a single point we only want one vertex to get processed not 4,
    
    this fixes a number of the atomic counters tests.
    
    Reviewed-by: Brian Paul <brianp at vmware.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=193a5cee6a535875542bb5d265bdeb21a8b93e9d
Author: Ian Romanick <ian.d.romanick at intel.com>
Date:   Mon Apr 11 18:40:02 2016 -0700

    nir: Fix typo in comment
    
    Trivial.
    
    Signed-off-by: Ian Romanick <ian.d.romanick at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=18c8b927e205d7c8f2a04377b1fa3c4242074de1
Author: Markus Wick <markus at selfnet.de>
Date:   Sat Apr 9 03:31:16 2016 +0200

    nir: Merge redudant integer clamping.
    
    Dolphin uses them a lot. Range tracking would be better in the long term,
    but this two lines works fine for now.
    
    Signed-off-by: Markus Wick <markus at selfnet.de>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfd17c76c1267756ea16051cbe174cb23ff49f44
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Apr 7 15:04:35 2016 -0700

    i965: Port INTEL_PRECISE_TRIG=1 to NIR.
    
    This makes the extra multiply visible to NIR's algebraic optimizations
    (for constant reassociation) as well as constant folding.  This means
    that when the result of sin/cos are multiplied by an constant, we can
    eliminate the extra multiply altogether, reducing the cost of the
    workaround.
    
    It also means we only have to implement it one place, rather than in
    both backends.
    
    This makes INTEL_PRECISE_TRIG=1 cost nothing on GPUTest/Volplosion,
    which has a ton of sin() calls, but always multiplies them by an
    immediate constant.  The extra multiply gets folded away.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0dffdc616801a1fd8534502e11ac840369041ab
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Apr 7 15:09:56 2016 -0700

    i965: Pass brw_compiler into brw_preprocess_nir() instead of is_scalar.
    
    I want to be able to read other fields.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Alejandro Piñeiro <apinheiro at igalia.com>
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=808d26c771541603544444ad5d8794e37e37e379
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Apr 7 15:03:39 2016 -0700

    nir: Silence unused "options" warning in algebraic passes.
    
    Some passes may not refer to options->..., at which point the compiler
    will warn about an unused variable.  Just cast to void unconditionally
    to shut it up.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5886cd79a0ed10b887840f6afb980a5a6a47e26e
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Apr 6 22:34:39 2016 -0700

    nir: Do basic constant reassociation.
    
    Many shaders contain expression trees of the form:
    
        const_1 * (value * const_2)
    
    Reorganizing these to
    
        (const_1 * const_2) * value
    
    will allow constant folding to combine the constants.  Sometimes, these
    constants are 2 and 0.5, so we can remove a multiply altogether.  Other
    times, it can create more immediate constants, which can actually hurt.
    
    Finding a good balance here is tricky.  While much more could be done,
    this simple patch seems to have a lot of positive benefit while having
    a low downside.
    
    shader-db results on Broadwell:
    
    total instructions in shared programs: 8963768 -> 8961369 (-0.03%)
    instructions in affected programs: 438318 -> 435919 (-0.55%)
    helped: 1502
    HURT: 245
    
    total cycles in shared programs: 71527354 -> 71421516 (-0.15%)
    cycles in affected programs: 11541788 -> 11435950 (-0.92%)
    helped: 3445
    HURT: 1224
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1c7ba7f15646367006d615180e89d5ea34a3d5f6
Author: Boyuan Zhang <boyuan.zhang at amd.com>
Date:   Fri Apr 8 11:31:15 2016 -0400

    radeon/uvd: alignment fix for decode message buffer
    
    Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
    Reviewed-by: Christian König <christian.koenig at amd.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=704d203d5f9bfaee1367678e3c4e11e25e22acc4
Author: Brian Paul <brianp at vmware.com>
Date:   Mon Apr 11 16:29:02 2016 -0600

    st/mesa: replace _mesa_sysval_to_semantic table with function
    
    Instead of using an array indexed by SYSTEM_VALUE_x, just use a
    switch statement.  This fixes a regression caused by inserting new
    SYSTEM_VALUE_ enums but not updating the mapping to TGSI semantics.
    
    v2: fix a few switch statement mistakes for compute-related enums
    
    Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9e6213edd757980475167331bda15c3970a538d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 10:54:27 2016 -0700

    nir/lower_system_values: Add support for several computed values
    
    Reviewed-by: Rob Clark <robdclark at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=39103145ffe325c4a1432c07e1ac02b1aef0bae5
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 10:51:23 2016 -0700

    glsl/shader_enums: Add the other two compute builtins
    
    These weren't added before because they are actually calculated values that
    are computed from other inputs.  However, in order to handle them in
    nir_lower_system_values, it's nice for them to have a cannonical locaiton.
    
    Reviewed-by: Rob Clark <robdclark at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=22836dbefa8b57fd788adf2693d7aab73c4de16a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 10:50:11 2016 -0700

    glsl/shader_enums: Add an enum for Vulkan InstanceIndex
    
    In Vulkan, you have InstanceIndex which begins at the base instance value
    rather than the zero-based InstanceID of GL.
    
    Reviewed-by: Rob Clark <robdclark at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=581c8016f846643ed9e836604211f4a46cef57e5
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Wed Apr 6 13:07:04 2016 +0100

    mesa: add missing header to the tarball
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e010a72c9bce217b49c564980509532d345b227
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Wed Apr 6 13:06:26 2016 +0100

    drivers/softpipe: add missing header to the tarball
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c69ab885d74c675091c1a143bd8a4abb2071112e
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 15:50:28 2016 +0100

    mesa: automake: update and reuse X86_SSE41_FILES list
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=28da0d6922b32985949eabce7de9a329c18cae83
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 14:48:20 2016 +0100

    compiler: android: flesh out nir into separate makefile
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d51500b2dec1dbe54a517e3b1448e96978e2256
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 14:42:50 2016 +0100

    compiler: automake: flesh out NIR into separate makefile.
    
    Analogous to previous commit - improved readability at the expense of
    an extra file.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9324afc0e9343417497667b15024a94da7654105
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date:   Tue Apr 5 14:40:42 2016 +0100

    compiler: automake: split out glsl into separate makefile
    
    Preserve the functionality while keeping the files smaller and
    more readable.
    
    v2: Do not include Makefile.sources from the GLSL makefile (silences
    automake warnings)
    
    Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net> (v1)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d67780b80df91bd0326b77dcc8d90af719e087e
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date:   Mon Apr 11 13:23:17 2016 +0100

    compiler: remove {glsl,nir}/Makefile.sources
    
    No longer used as of last commit.
    
    v2: Rebase.
    
    Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net> (v1)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c481c8f7f135d4cf17e35bb5126bdcf6b5611940
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 14:29:41 2016 +0100

    configure.ac: update the path of the generated files
    
    ... in order to determine if we need bison/flex. Failing to locate the
    files will lead to mandating bison/flex even when building from a
    release tarball.
    
    CC: "11.2" <mesa-stable at lists.freedesktop.org>
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4db8f15a257679b90ad98f8fb46bbb71d2075cfa
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 14:25:19 2016 +0100

    glsl: move the android build scripts a level up
    
    Analogous to previous commit.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=abf7088eb7674e78541b4585e468cc6de7735b8c
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 14:05:19 2016 +0100

    glsl: move the scons build script a level up
    
    It will allow us to remove the duplicate glsl/Makefile.sources.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Acked-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=594e8685559215833a3da751314b0b606c3fa65f
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Apr 5 13:00:52 2016 +0100

    Part revert "gallium/auxiliary: don't build NIR sources with MSVC2008 flags"
    
    This reverts commit 41c7912d04111a7e3b75a438c5cbbd7edc0fee25 but leaves
    out the pragma [that inspired the original commit].
    
    Building mesa requires MSVC2013 or later, thus we no longer need this.
    
    v2: Use correct include path (src/glsl/nir -> src/compiler/nir)
    
    Conflicts:
    	src/gallium/auxiliary/Makefile.am
    
    Acked-by: Jason Ekstrand <jason at jlekstrand.net> (v1)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=590a37dc05ceacd36d9e78c5e5c40e77548f6b39
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Mon Apr 11 12:48:10 2016 -0500

    GL3: ARB_shader_image_load_store/size is done for radeonsi also in GLES
    
    Trivial.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=05aec42d3d9b4aa357caf21c91a462e182a82b9f
Author: Brian Paul <brianp at vmware.com>
Date:   Mon Apr 11 09:10:29 2016 -0600

    docs: fix Coverity URL

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d97f5d60f51454727c8d854977c3050a7827d415
Author: Oded Gabbay <oded.gabbay at gmail.com>
Date:   Sun Mar 20 10:41:40 2016 +0200

    tgsi/doc: fix spelling error
    
    Signed-off-by: Oded Gabbay <oded.gabbay at gmail.com>
    Reviewed-by: Rob Clark <robdclark at gmail.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a89c47415774fe9b5458a7ec7e072711e06201e6
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Thu Nov 12 11:40:34 2015 +0100

    nir: add a pass for lowering (un)pack_double_2x32
    
    v2: Undo unintended change to the signature of
        nir_normalize_cubemap_coords (Iago).
    
    v3: Move to compiler/nir (Iago)
    
    v4: Remove Authors from copyright header (Michael Schellenberger)
    
    v5 (Sam):
    - Use nir_channel() and nir_ssa_for_alu_src() helpers (Jason)
    - Inline lower_double_pack_instr() code into lower_double_pack_block()
      (Jason).
    - Initialize nir_builder at lower_double_pack_impl() (Jason).
    
    Signed-off-by: Iago Toral Quiroga <itoral at igalia.com>
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=663e6421df9bb94cf9b46bb0b41f0d5331aa02fe
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Fri Aug 7 08:37:38 2015 -0700

    nir: add split versions of (un)pack_double_2x32
    
    v2 (Sam):
    - Use uint64 instead of float64 for sources and destinations. (Connor)
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b093808d26c3c6e06db6329debbb3cfa7acf3a48
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Fri Jul 31 10:52:25 2015 -0700

    nir: don't try to scalarize unpack_double_2x32
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e31e0a21bd462b5a06e187bbaf95d3752052ef0
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Fri Aug 14 12:20:37 2015 -0700

    nir: add support for (un)pack_double_2x32
    
    v2 (Sam):
    - Use uint64 instead of float64 for sources and destinations. (Connor)
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5d6260329ed2df4aaffffac18d8998d4ad3676b
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Jan 12 14:03:08 2016 +0100

    nir: add i2d and u2d opcodes
    
    v2:
    - Assert supports_int and don't fallback to nir_fmov (Jason)
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b16d06252e9179f5c279da69ee194cc0400ae403
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Jan 12 12:39:58 2016 +0100

    nir: add d2i, d2u, d2b opcodes
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a4bce07dc6ebbd74dfb47394962d573ed01ee482
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Wed Jul 29 23:46:20 2015 -0700

    nir: add support for d2f and f2d
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fab5d4cd9582aa5289143876c26af23ff855f355
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Thu Jan 21 13:23:55 2016 +0100

    nir/glsl_to_nir: set bit_size on ssbo_load result
    
    v2 (Sam):
    - Add missing bit_size assignment when ssbo_load destination is a boolean.
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a741378cb59e4263f909d73498ebf153375e6dcc
Author: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Date:   Mon Apr 4 10:16:11 2016 +0200

    nir/glsl_to_nir: add bit-size info to add_instr()
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b37c64f3b547b1f769e0048217f9736a83ce12d
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Tue Aug 4 14:04:54 2015 -0700

    nir/split_var_copies: handle doubles
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=106a1b5501b23503394fbb9dd99ab30def60652e
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Mon Aug 3 15:05:38 2015 -0700

    nir/instr_set: handle 64-bit bit-sizes
    
    v2: Revert spurious change in nir_opt_cse.c (Iago)
    
    Signed-off-by: Iago Toral Quiroga <itoral at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f2ccb63be17544fc156c22b4ef1b873452af5dd2
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Fri Aug 14 10:40:03 2015 -0700

    nir: handle doubles in nir_deref_get_const_initializer_load()
    
    v2 (Sam):
    - Use proper bitsize value when calling to nir_load_const_instr_create()
      (Jason).
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=41c2541fc77fc32a89f2124bfcf6340959a48534
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Fri Aug 14 10:37:18 2015 -0700

    nir/print: add support for printing doubles and bitsize
    
    v2:
    - Squash the printing doubles related patches into one patch (Sam).
    
    v3:
    - Print using PRIx64 format: long is 32-bit on some 32-bit platforms but long
    long is basically always 64-bit (Jason).
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5551f8a8bdf2786620010554e526d329c7622b5
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Thu Nov 12 11:18:50 2015 +0100

    nir/glsl_to_nir: support doubles
    
    v2:
    - Don't set sized types to the destination of texture related opcodes.
      (Jason)
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e69782e3e4e574e0395f8300f86e32633d2f21a
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Wed Feb 10 16:05:11 2016 +0100

    nir/lower_load_const_to_scalar: support doubles and multiple bit sizes
    
    v2 (Sam):
    - Add assert to detect bitsizes differents than 32 and 64 (Jason).
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=12f628adcbe2f87073fb06f98a98414b898cde5d
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Fri Nov 6 11:19:58 2015 +0100

    nir/lower_to_source_mods: Handle different bit sizes
    
    v2 (Sam):
    - Use helper to get base type from nir_alu_type.
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3663a2397e47da9b766b0c4239a8b74ac77b5d04
Author: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Date:   Wed Mar 23 08:04:18 2016 +0100

    nir: add bit_size info to nir_load_const_instr_create()
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5b17ae7455af205a89074d176289affbf68e444
Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Mon Nov 2 18:33:46 2015 -0500

    nir/lower_vec: adapt to different bit sizes
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3edaec739a72a36d54b60ddf5c952d377324f00
Author: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
Date:   Wed Mar 23 08:04:09 2016 +0100

    nir: add bit_size info to nir_ssa_undef_instr_create()
    
    v2:
    - Make the users to give the right bit_sizes as arguments (Jason).
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=41a39e338470d2b0e1b78e5e45d673f64f4dc418
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Tue Nov 17 15:50:00 2015 +0100

    nir/locals_to_regs: adapt to different bit sizes
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=40d1b671a96247c3dca55114127cd92ead60441f
Author: Connor Abbott <connor.w.abbott at intel.com>
Date:   Tue Nov 17 15:49:29 2015 +0100

    nir/from_ssa: adapt to different bit sizes
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4979cec8201523f38654771486a065000888b27d
Author: Timothy Arceri <timothy.arceri at collabora.com>
Date:   Sun Apr 10 12:28:00 2016 +1000

    i965: fix struct type in comment
    
    Reviewed-by: Eduardo Lima Mitev <elima at igalia.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d58cfa36680206f7b81d47c6507e0b56b8468c5
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Mar 25 10:23:25 2016 -0700

    nir: Add a pass for gathering various bits of shader info
    
    Reviewed-by: Rob Clark <robdclark at gmail.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=875543e270de67e99ce049ca01b6cde8ac6911e1
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Tue Mar 29 19:30:31 2016 -0400

    i965: enable OES_texture_buffer on gen7+
    
    It will only end up getting exposed on gen8+ since it requires GL ES
    3.1, but it should be ready to go on gen7 when support for GL ES 3.1 is
    completed there.
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
    Tested-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f5f818b6d9fa5ab8ed7665c85df65237e34aa24
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Apr 11 13:10:36 2016 +1000

    docs: add some missing softpipe entries.
    
    I just forgot these when I added this stuff.
    
    Signed-off-by: Dave Airlie <airlied at redhat.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=26c56e24e700d0ab4c6499fea28328045b5e4b32
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sun Apr 3 00:48:03 2016 -0700

    glsl: Don't remove XFB-only varyings.
    
    Consider the case of linking a program with both a vertex and fragment
    shader.  The VS may compute output varyings that are intended for
    transform feedback, and not read by the fragment shader.
    
    In this case, var->data.is_unmatched_generic_inout will be true,
    but we still cannot eliminate the varyings.  We need to also check
    !var->data.is_xfb_only.
    
    Fixes failures in ES31-CTS.gpu_shader5.fma_precision_*, which happen
    to use transform feedback in a way we apparently hadn't seen before.
    
    Cc: mesa-stable at lists.freedesktop.org
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce84a92df54c738d2c248716f0f673247d50e1a7
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Apr 8 13:52:30 2016 -0700

    i965/disasm: Decode per-slot offsets.
    
    We just never bothered to decode this.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=20c8f365081801b3370b705d18a01f13c181abe9
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Apr 8 13:48:46 2016 -0700

    i965/disasm: Decode "channel mask present" bit correctly.
    
    Bit 15 means "interleave" for most messages, but for SIMD8 messages it
    means "use channel masks".
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b790232524d46ef888a3657d205aa18502b09d3f
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Fri Apr 8 13:38:54 2016 -0700

    i965/disasm: Simplify the URB opcode printing with ?:.
    
    Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Ben Widawsky <ben at bwidawsk.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b5bd20eb2d09e1ec2319b55c83ad7f28b6fefee
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sat Apr 9 13:11:42 2016 -0400

    glsl: allow usage of the keyword buffer before GLSL 430 / ESSL 310
    
    The GLSL 4.20 and ESSL 3.00 specs don't list 'buffer' as a reserved
    keyword. Make the parser ignore it unless GLSL 4.30 / ESSL 3.10 are
    used, or ARB_shader_storage_buffer_objects is enabled.
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>
    Cc: mesa-stable at lists.freedesktop.org

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cdb6fa91fa79c0c9a796730e9ecae320bebdb825
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sat Jan 23 08:37:03 2016 -0500

    nvc0: handle the case where there are no framebuffer attachments
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=59ca92137b3841a65d9232bee1164bff1e6bd57d
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sun Apr 3 16:02:59 2016 -0400

    nv50,nvc0: support sending string markers down into the command stream
    
    This should hopefully make it a little easier to debug with GL
    applications like glretrace and looking at command streams.
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9480d7918a2da19b8ac85a8326049488feef92b
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Sun Apr 3 15:11:39 2016 -0400

    nv50,nvc0: add invalidate_resource support for buffer resources
    
    Provide a callback to reallocate the underlying storage of a resource so
    that it is not bound to any existing fences.
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=30b818d5eb67c7427fbefb456c7bc2d876bf9eac
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 14:11:10 2016 -0700

    vc4: Move FRAG_X/Y/REV_FLAG to a QFILE like VPM or TLB color writes.
    
    This gives us one less set of special instruction generation cases, and
    instead just the case for returning the correct register to read.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f029932cac36859df5a6d04d1dd7343672ced83a
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 13:12:41 2016 -0700

    vc4: Allow TLB Z/color/stencil writes from any ALU operation in QIR.
    
    This lets us write the Z directly from the FTOI for computed Z, and may
    let us coalesce color writes in the future.
    
    No change in my shader-db, but clearly drops an instruction in piglit's
    early-z test.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=44d7b8ad12df504058615901c7233c45e4f24a9f
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 14:17:45 2016 -0700

    vc4: Add a helper function for the construction of qregs.
    
    The separate declaration of the struct is not helping clarity, and I was
    going to be writing a whole lot more of these in the upcoming patches.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=114c8b38d317629769ad0fcf3f84e24951ffcd7c
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 12:58:48 2016 -0700

    vc4: Add missing scheduling dependency for MS color writes.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=483c172989be74a992befce3c0a9058a82b35c80
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 12:49:08 2016 -0700

    vc4: Drop the multi_instruction distinction for QIR instructions.
    
    It wasn't correctly flagged everywhere, and QPU generation now handles the
    only remaining case that was paying attention to it.
    
    No change on shader-db.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8b525f8c4a71da42529453b3d0a7604fbd3195d
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 12:44:31 2016 -0700

    vc4: Handle SF on instructions that write r4.
    
    Normal SFU writes couldn't have SF because they were marked as
    multi_instruction, but tex_result and tlb_color_read weren't.  This ended
    up not being a problem according to anything in shader-db, but it seems
    possible.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e46b48963a6f336049af3d10649bab48cd12fdee
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Mar 21 12:18:07 2016 -0700

    vc4: Allow multi-instruction QIR nodes to get VPM optimization.
    
    There used to be multi-instruction operations that would use src[] twice,
    which is why we couldn't do some optimizations on them.  This is no longer
    the case.
    
    total instructions in shared programs: 77973 -> 77969 (-0.01%)
    instructions in affected programs:     84 -> 80 (-4.76%)
    total estimated cycles in shared programs: 234165 -> 234157 (-0.00%)
    estimated cycles in affected programs:     92 -> 84 (-8.70%)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=99a759a4a3c29c283ae93612017d2f31c0ddbe73
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Apr 8 14:05:22 2016 -0700

    vc4: Switch to using NIR_PASS macros.
    
    This gets us better validation of our NIR transformations.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7030eadbed7cbcdb00ce41bbbc4ca93854314d71
Author: Eric Anholt <eric at anholt.net>
Date:   Fri Apr 8 14:53:55 2016 -0700

    vc4: Handle nir_intrinsic_load_user_clip_plane as a vec4.
    
    I liked having all my NIR be scalar, but nir_validate() complains that the
    intrinsic writes 4 components but the destination we set up was only 1
    component.  I could generate a new scalar variant, but it's a lot easier
    to just leave it as a vec4.  This doesn't hurt codegen since we GC unused
    uniforms, and UCP dot products use all the components anyway.

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=40e77741cf1e9a74b867c7d132ca2346fe1584e4
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Tue Mar 15 23:00:28 2016 -0400

    vc4: Emit a warning and proceed for handling loops in NIR.
    
    We don't really suppor control flow yet, but it's a lot nicer to render
    something and warn on stderr than to crash.
    
    Fixes the following piglit tests:
    - shaders/complex-loop-analysis-bug
    - shaders/glsl-fs-discard-04
    
    Converts the following piglit tests from crash to fail:
    - shaders/glsl-fs-continue-inside-do-while
    - shaders/glsl-fs-loop
    - shaders/glsl-fs-loop-continue
    - shaders/glsl-fs-loop-nested
    - shaders/glsl-texcoord-array
    - shaders/glsl-vs-continue-inside-do-while
    - shaders/glsl-vs-loop
    - shaders/glsl-vs-loop-continue
    - shaders/glsl-vs-loop-nested
    
    No piglit regressions.
    
    v2 (Eric): Add stronger stderr warning.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2450b219e5706c86d0539b38f5f579bff148e9ef
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Mar 12 18:34:02 2016 -0500

    vc4: Add a stub for NIR->QIR of control flow function nodes
    
    We shouldn't have any NIR functions present since all GLSL functions get
    inlined, but this would be a more informative error if it does happen.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5997778bcafedd0d32b2399cb621a736051c4c2
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Sat Mar 12 18:34:01 2016 -0500

    vc4: Add better debug of NIR->QIR control flow graph failure
    
    Ensure NIR control flow graph nodes that are unhandled in QIR
    are reported with sufficient verbosity to aid debugging.
    
    This improves piglit outputs, amongst other tools.
    
    There are no other remaining uses of assert(0) as a blunt tool
    within vc4.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e529dd179f3f4bcc069239e9c2710ea23616a513
Author: Rhys Kidd <rhyskidd at gmail.com>
Date:   Fri Apr 1 19:46:30 2016 -0400

    vc4: Remove unused include from vc4_program.c
    
    Found with grep and inspection. Test compiled on RPi hw.
    Assists any future effort to remove TGSI as an intermediate stage.
    
    Signed-off-by: Rhys Kidd <rhyskidd at gmail.com>
    Reviewed-by: Eric Anholt <eric at anholt.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e25c24c6389e5dbbb7ebf59c302659e5d6417ed4
Author: Lars Hamre <chemecse at gmail.com>
Date:   Fri Apr 8 10:06:23 2016 -0400

    glsl: handle unsigned int wraparound in link_shaders()
    
    v2: change check_explicit_uniform_locations() to return an
        unsigned 0 (Timothy Arceri)
    
    We were storing the int result of check_explicit_uniform_locations()
    in num_explicit_uniform_locs as an unsigned int which caused it to
    be 4294967295 when a -1 was returned.
    
    This in turn would cause the following error during linking:
    error: count of uniform locations > MAX_UNIFORM_LOCATIONS(4294967295 > 98304)
    
    Results from running piglit tests/all with this patch
    and when ARB_explicit_uniform_location disabled:
    
    changes:     178
    fixes:       176
    regressions: 2
    
    The two regressions are for the following tests:
    glean at glsl1-matrix column check (1)
    glean at glsl1-matrix column check (2)
    which regress from FAIL to CRASH.
    
    The regressions are acceptable because the tests are currently failing due to
    the aforementioned linker error.
    
    Signed-off-by: Lars Hamre <chemecse at gmail.com>
    Reviewed-by: Timothy Arceri <timothy.arceri at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6cc7aec5b05ff19d9bdf2b33c993257625d7c9fc
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Apr 7 11:36:47 2016 -0700

    i965/tiled_memcopy: Get rid of the direction parameter to get_memcpy
    
    Now that we can use the much simpler rgba8_copy function, we don't need to
    hand different functions out based on direction.
    
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Chad Versace <chad.versace at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d2b32656e18607f5807b3f4d4dde02568370b9bf
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Apr 7 11:21:19 2016 -0700

    i965/tiled_memcpy: Rework the RGBA -> BGRA mem_copy functions
    
    This splits the two copy functions into three: One for unaligned copies,
    one for aligned sources, and one for aligned destinations.  Thanks to the
    previous commit, we are now guaranteed that the aligned ones will *only*
    operate on aligned memory so they should be safe.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93962
    Cc: "11.1 11.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Chad Versace <chad.versace at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6f54a29ca9bc8c1a1a994ff4e3ee09772de78e4
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Thu Apr 7 10:52:28 2016 -0700

    i965/tiled_memcopy: Add aligned mem_copy parameters to the [de]tiling functions
    
    Each of the [de]tiling functions has three mem_copy calls:
    
     1) Left edge to tile boundary
     2) Tile boundary to tile boundary in a loop
     3) Tile boundary to right edge
    
    Copies 2 and 3 start at a tile edge so the pointer to tiled memory is
    guaranteed to be at least 16-byte aligned.  Copy 1, on the other hand,
    starts at some arbitrary place in the tile so it doesn't have any such
    alignment guarantees.
    
    Cc: "11.1 11.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Chad Versace <chad.versace at intel.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5295b5fb442d433b22e3b6f4b5c28a0e48677cd
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Thu Apr 7 10:53:14 2016 -0700

    i965: Check eu/subslices are > 0
    
    Now that the check is restricted to gen8+, we should always get back a non-zero
    positive value for the EU and subslice counts.
    
    Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc01b63d730d151097dd6c3d2030a4731e09a393
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Thu Apr 7 10:53:13 2016 -0700

    i965: Fix eu/subslice warning
    
    Older gen platforms do not actually return a value for sublice and eu total
    (IMO, confusingly) they return -ENODEV. This patch defers the SSEU setup until
    we have the actual GPU generation to avoid useless warnings when running on
    older platforms with older kernels.
    
    Reported-by: Mark Janes <mark.a.janes at intel.com>
    Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4213b00e30d4d70823dca25e299e7b034c91d94c
Author: Ben Widawsky <benjamin.widawsky at intel.com>
Date:   Thu Apr 7 10:53:12 2016 -0700

    i965: Extract SSEU configuration info
    
    Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4420f189b6d6dd68b517cd73dfdf3775d7d0f580
Author: Brian Paul <brianp at vmware.com>
Date:   Thu Apr 7 17:38:41 2016 -0600

    st/mesa: fix glReadBuffer() assertion failure
    
    If the first call in a GL app is glReadPixels(GL_FRONT) we'd fail the
    assert(st->ctx->FragmentProgram._Current) at st_atom_shader.c:114 in
    update_fp().
    
    This is because we were calling st_validate_state() without first
    updating Mesa state with _mesa_update_state().
    
    The regression came from commit 83b589301f4a150f4 "st/mesa: fix
    frontbuffer glReadPixels regressions".
    
    The new piglit gl-1.0-simple-readbuffer test exercises this.
    
    Cc: "11.1 11.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Jose Fonseca <jfonseca at vmware.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9855dcdf7c94605305d6372d1f9883f76d10b6a
Author: Thomas Hindoe Paaboel Andersen <phomes at gmail.com>
Date:   Sat Mar 5 13:07:07 2016 +0100

    st/va: avoid dereference after free in vlVaDestroyImage
    
    Cc: "11.1 11.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
    Tested-by: Julien Isorce <j.isorce at samsung.com>




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