Mesa (11.2): i965: Use brw-> urb.min_vs_urb_entries instead of 32 for BLORP.

[Emil Velikov]

Module: Mesa
Branch: 11.2
Commit: 50013e5db8703c0b07d6c33390de1cd3696b3749
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=50013e5db8703c0b07d6c33390de1cd3696b3749

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Thu Mar 31 00:53:21 2016 -0700

i965: Use brw->urb.min_vs_urb_entries instead of 32 for BLORP.

Haswell GT2 and GT3 have a minimum of 64 entries.  Hardcoding 32
is not legal.

v2: Delete stale comment (caught by Alejandro).

Cc: mesa-stable at lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
(cherry picked from commit a57320a9ba4f453c567716bf8270c0ac629ad0d2)

---

 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index 89b73ca..eae1e30 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -55,11 +55,8 @@ gen7_blorp_emit_urb_config(struct brw_context *brw)
                                  0 /* gs_size */,
                                  urb_size / 2 /* fs_size */);
 
-   /* The minimum valid number of VS entries is 32. See 3DSTATE_URB_VS, Dword
-    * 1.15:0 "VS Number of URB Entries".
-    */
    gen7_emit_urb_state(brw,
-                       32 /* num_vs_entries */,
+                       brw->urb.min_vs_entries /* num_vs_entries */,
                        2 /* vs_size */,
                        2 /* vs_start */,
                        0 /* num_hs_entries */,