Mesa (master): vc4: Fix validation of full res tile offset if used for non-MSAA.
Eric Anholt
anholt at kemper.freedesktop.org
Fri Apr 22 18:27:54 UTC 2016
Module: Mesa
Branch: master
Commit: 876c64719472bf81d2d2a4b46fb406f91caa6ac4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=876c64719472bf81d2d2a4b46fb406f91caa6ac4
Author: Eric Anholt <eric at anholt.net>
Date: Mon Dec 14 11:14:13 2015 -0800
vc4: Fix validation of full res tile offset if used for non-MSAA.
There's no reason we couldn't do non-MSAA full resolution tile buffer
load/stores, but we would have claimed buffer overflow was being
attempted. Nothing does this currently.
---
src/gallium/drivers/vc4/kernel/vc4_drv.h | 2 ++
src/gallium/drivers/vc4/kernel/vc4_gem.c | 9 +++++++++
src/gallium/drivers/vc4/kernel/vc4_render_cl.c | 5 +++--
3 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_drv.h b/src/gallium/drivers/vc4/kernel/vc4_drv.h
index ffc9737..3dccdf3 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_drv.h
+++ b/src/gallium/drivers/vc4/kernel/vc4_drv.h
@@ -81,6 +81,8 @@ struct vc4_exec_info {
struct drm_gem_cma_object *tile_bo;
uint32_t tile_alloc_offset;
+ uint32_t tile_width, tile_height;
+
/**
* Computed addresses pointing into exec_bo where we start the
* bin thread (ct0) and render thread (ct1).
diff --git a/src/gallium/drivers/vc4/kernel/vc4_gem.c b/src/gallium/drivers/vc4/kernel/vc4_gem.c
index 93f9ec7..12350b8 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_gem.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_gem.c
@@ -139,8 +139,17 @@ fail:
int
vc4_cl_validate(struct drm_device *dev, struct vc4_exec_info *exec)
{
+ struct drm_vc4_submit_cl *args = exec->args;
int ret = 0;
+ if (args->color_write.bits & VC4_RENDER_CONFIG_MS_MODE_4X) {
+ exec->tile_width = 32;
+ exec->tile_height = 32;
+ } else {
+ exec->tile_width = 64;
+ exec->tile_height = 64;
+ }
+
if (exec->args->bin_cl_size != 0) {
ret = vc4_get_bcl(dev, exec);
if (ret)
diff --git a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
index d9c6842..b926d35 100644
--- a/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
+++ b/src/gallium/drivers/vc4/kernel/vc4_render_cl.c
@@ -95,7 +95,7 @@ static uint32_t vc4_full_res_offset(struct vc4_exec_info *exec,
uint8_t x, uint8_t y)
{
return bo->paddr + surf->offset + VC4_TILE_BUFFER_SIZE *
- (DIV_ROUND_UP(exec->args->width, 32) * y + x);
+ (DIV_ROUND_UP(exec->args->width, exec->tile_width) * y + x);
}
/*
@@ -369,7 +369,8 @@ static int vc4_full_res_bounds_check(struct vc4_exec_info *exec,
struct drm_vc4_submit_rcl_surface *surf)
{
struct drm_vc4_submit_cl *args = exec->args;
- u32 render_tiles_stride = DIV_ROUND_UP(exec->args->width, 32);
+ u32 render_tiles_stride = DIV_ROUND_UP(exec->args->width,
+ exec->tile_width);
if (surf->offset > obj->base.size) {
DRM_ERROR("surface offset %d > BO size %zd\n",
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