Mesa (master): radeonsi: don't set CB_COLOR1_INFO for dual src blending

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 2d2b384066cb19d18592a974e4fe4ca16635103d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2d2b384066cb19d18592a974e4fe4ca16635103d

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Wed Aug 10 12:21:53 2016 +0200

radeonsi: don't set CB_COLOR1_INFO for dual src blending

Vulkan doesn't do this. The reason may be that CB_COLOR1_INFO.SOURCE_FORMAT
from NI was moved to SPI_SHADER_COL_FORMAT for SI.

I asked CB guys about this 2 days ago and they still haven't replied.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

---

 src/gallium/drivers/radeonsi/si_state.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 5d55448..a44f977 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2507,13 +2507,6 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
 					 tex->dcc_offset +
 				         tex->surface.level[cb->base.u.tex.level].dcc_offset) >> 8);
 	}
-	/* set CB_COLOR1_INFO for possible dual-src blending */
-	if (i == 1 && state->cbufs[0] &&
-	    sctx->framebuffer.dirty_cbufs & (1 << 0)) {
-		radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + 1 * 0x3C,
-				       cb_color_info);
-		i++;
-	}
 	for (; i < 8 ; i++)
 		if (sctx->framebuffer.dirty_cbufs & (1 << i))
 			radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, 0);