Mesa (master): 64 new commits
Jason Ekstrand
jekstrand at kemper.freedesktop.org
Wed Aug 17 21:50:43 UTC 2016
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=342756a100661223c8a933d046efd276fe8d4593
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Aug 8 16:53:00 2016 -0700
i965/blorp: Use nir_alu_type for the texture data type
This lets us remove the brw_reg.h include
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce2a9831cce5e00cfe80468ccae7410aca28e9da
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Aug 8 15:33:43 2016 -0700
i965: brw_blorp_blit.cpp -> blorp_blit.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=934adf1c3073fce8f0a25e11fced0d7c7d744624
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Aug 8 15:30:57 2016 -0700
i965: brw_blorp_clear.cpp -> blorp_clear.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f5fbcc36831cd23ee9402a9fb8a9fb70d6ac412d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Aug 8 15:25:17 2016 -0700
i965: Split brw_blorp.c/h into multiple files
This mega-commit pulls most of the i965-specific bits of blorp into the
brw_blorp.c/h files which now contain nothing but i965 wrappers around
"core blorp" calls. The "core blorp" api is moved into blorp.h and the
internal blorp data structures are moved into blorp_priv.h. The new file
blorp.c is created to house "core blorp" internals which are pulled from
the old brw_blorp.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=075cc874bbdd3513034852f658204fb20ab36359
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 25 17:48:05 2016 -0700
i965/blorp: Factor the guts of blorp_hiz_exec into a helper
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d22fd934ac50bef36173e93c3521378a7767614
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 25 14:03:49 2016 -0700
i965/blorp: Break the guts of do_single_blorp_clear into two helpers
The helpers are completely miptree-unaware and each fairly cleanly do a
single thing. This does come at the downside of not doing proper debug
reporting on whether or not we're doing replicated clears.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cddca39c04892feb5cccba8de8c6472012145e3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 25 14:03:42 2016 -0700
i965/meta_util: Convert get_fast_clear_rect to take an isl_surf
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=376ce1d26ed744e94d10c762501668e7a18d01b4
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 25 14:09:14 2016 -0700
i965/blorp/clear: Move isl_surf setup higher in the function
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=583f040fdab9f9cbd1b5e874cad820296d7a02a4
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 25 14:44:50 2016 -0700
i965/blorp: Refactor fast-clear logic a bit
This pulls the mcs allocation into the if statement where we initially
determine that we are doing a fast clear and moves the programming of
wm_inputs and figuring out the fast clear rect into it's own if statement.
The next commit will put code inbetween the two.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=457a40893260f4456433dc5667edbb9094cda130
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jul 25 14:05:48 2016 -0700
i965/blorp/clear: Stop stomping the destination format
The blorp_surface_info_init call above should set the format for us and
stomping it later does nothing whatsoever.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6c2091da6d8ba1dd237fadde60804a37a88a3d8
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Jul 24 01:13:49 2016 -0700
i965/meta_util: Only modify the input parameters in get_fast_clear_rect
We had another inline copy of brw_meta_get_buffer_rect embedded in
get_fast_clear_rect for no good reason. This lets us get rid of the
gl_frameuffer parameter to get_fast_clear_rect.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f748e157352bba0b46db52b5f2e21e68e04391d0
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Jul 24 01:08:14 2016 -0700
i965/blorp: Stop calling brw_meta_get_buffer_rect
We already have an inlined version of the function slightly higher up in
do_single_blorp_clear and all calling it does is stomp the values with the
same thing. We might as well just get rid of it.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=18aad17ce254ec52414a00fc7c9ddcfa0da7c449
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Jul 23 12:46:10 2016 -0700
i965/blorp: Pull the guts of resolve_color into a miptree-agnostic helper
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dff74b83e11c508cdc782f696d8166834857e0cc
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sat Jul 23 12:13:07 2016 -0700
i965/meta_util: Convert get_resolve_rect to use ISL
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fccdf85ba329dc4ccd5764e430ae8d9abce0c69
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 19 19:19:12 2016 -0700
i965/blorp: Make the guts of brw_blorp_blit_miptrees miptree-unaware
Now that we have the brw_blorp_surf struct, we can start to make bits of
blorp completely miptree-unaware. To start things off, we split the guts
of brw_blorp_blit_miptrees into a brw_blorp_blit function which knows
nothing about miptrees.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=75deae9c9064382976aa261e1ff3057939c22cd5
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 19 19:04:03 2016 -0700
i965/blorp: Add a new brw_blorp_surf intermediate struct
At the moment, this seems to make all of the interfaces messier rather than
clener. However, it does provide a representation of a surface that
simultaneously contains everything and is completely unaware of miptrees.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=57664c869ffcea436449f77a36dd6538c934c125
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 19 19:01:38 2016 -0700
i965/blorp: Use the isl_surf for more params setup
The isl_surf munging doesn't happen until fairly late in the blorp_blit
function. We can use the isl_surf for the vast majority if not all of our
params setup.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8644f3eb6d24c50f8fbad4820e5b9e7803d09c3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 19 19:59:16 2016 -0700
i965/blorp: Do gen6 stencil offsets up-front
This keeps all of the nastyness of gen6 stencil on the i965 side of the API
line and lets us delete that nasty hand-rolled ISL-based offset path that
we were using for ALL_SLICES_AT_EACH_LOD.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=406c503396b3b4ab01d97d3e90eb09f2ed10a281
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 22 14:41:43 2016 -0700
i965/blorp: Set up HiZ surfaces up-front
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d86b3fa2dbc38bffdd87de7d6e81b488a068155
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 1 16:01:56 2016 -0700
i964/blorp: Set up most aux surfaces up-front
This commit also adds support for an offset for aux surfaces. In GL, this
only gets used for HiZ on SNB at the moment. However, in Vulkan, all aux
surfaces are at a non-zero offset and that is likely to happen in GL
eventually.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d540864730f2cfa36366a47021554ac00b625b58
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 22 14:24:06 2016 -0700
i965/blorp: Stop using the miptree in state setup for tex/rt surfaces
This commit movies us from a miptree model to a surf+bo+offset model. In
the GL driver, miptrees are almost always at the start of the bo so the
offset is zero but we don't want to always make that assumption. In the
sort term, gen6 stencil and HiZ will be at an offset but, in the long term,
any Vulkan surface is liable to be at a non-zero offset.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b02cd44d71563e193029c1cf3f4ddefbe309bb3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 1 14:05:57 2016 -0700
i965/blorp/blit: Move format work-arounds before surface_info_init
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20c06d2b7970f3d1dc709e0963956031b60dc21d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 26 09:30:15 2016 -0700
i965/miptree: Add real support for HiZ
The previous HiZ support was bogus because all of get_aux_isl_surf looked
at mt->mcs_mt directly. For HiZ buffers, you need to look at either
mt->hiz_buf or mt->hiz_buf->mt.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc880c99b656988eadf012000a01869e40be8f57
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Aug 5 15:06:36 2016 -0700
isl/state: Only set clear color if aux is used
Otherwise, the clear color will get ignored. This prevents assertion
errors if clear color is set to something invalid and aux is not used.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2684e48321ac2a22161ae3ed1c21c0169946eed9
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 1 16:02:29 2016 -0700
i965/miptree: Use the isl helpers for creating aux surfaces
In order for the calculations of things such as fast clear rectangles to
work, we need more details of the auxiliary surface to be correct. In
particular, we need to be able to trust the width and height fields.
(These are not necessarily what you want coming out of the miptree.) The
only values state setup really cares about are the row and array pitch and
those we can safely stomp from the miptree.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d9df82f2fff27460531243c83158eab1215d1c79
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Sun Jul 24 00:52:34 2016 -0700
isl: Add helpers for creating different types of aux surfaces
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c44d9965374641e73273cd006477ee6a97e8f9f
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 26 09:33:23 2016 -0700
i965/miptree: Use mcs_mt->qpitch for aux surfaces
At one point, we were doing this correctly. It must have gotten lost in
one of the many rebases.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=67ea60db0b69b06e2621f21ba5d3c88ed10e2028
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jul 19 16:25:50 2016 -0700
i965/miptree: Allow get_aux_isl_surf when there is no aux surface
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd46c8da31e2ad6c9ff4909b8759aac75d3766e6
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 1 16:02:45 2016 -0700
i965/miptree: Support depth in get_isl_clear_color
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6155d4ef569558076321f391386aa0cb2eab1ede
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jun 28 14:38:54 2016 -0700
isl/state: Add an assertion for IVB multisample array textures
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c75b315e13e88555cb7aed7549a4526a140ac7e
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jun 28 16:14:24 2016 -0700
isl: Add a #define for DEV_IS_BAYTRAIL
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=56746d04d59f711d5ace0b86f2b2da96bd337ea1
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 18:34:02 2016 -0700
i965/blorp: Remove unused fields from blorp_surface_info
The only reason why we need layer or level is that we need the z-offset for
3-D surfaces. Let's just have the one field for that.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1495b6315ebe6c8bfe04641a5d45983004a2e8ba
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 18:33:05 2016 -0700
i965/blorp: Simplify depth buffer state setup a bit
The data comes in via ISL in a format that's almost directly usable by the
hardware so we can avoid some of the conversion headache.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d81435336510ee00b59d5fb538ca5fb065abd579
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 17:13:39 2016 -0700
i965/blorp: Use the generic surface state path for gen8 textures
Now that the generic blorp path uses base level/layer, there's no need to
make gen8 special.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed432fd681fce210a74e2de03442a801c37676d3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 08:43:27 2016 -0700
isl: Add asserts for gen8+ X/YOffset rules
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=96fa98c18e54a31622a0dea5516f7db7642ca866
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 11:54:14 2016 -0700
i965/blorp: Only do offset hacks for fake W-tiling and IMS
Since the dawn of time, blorp has used offsets directly to get at different
mip levels and array slices of surfaces. This isn't really necessary since
we can just use the base level/layer provided in the surface state. While
it may have simplified blorp's original design, we haven't been using the
blorp path for surface state on gen8 thanks to render compression and
there's really no good need for it most of the time. This commit restricts
such surface munging to the cases of fake W-tiling and fake interleaved
multisampling.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f9abc82149839159a5fe5412ad09daa4f80442d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jun 28 14:46:07 2016 -0700
i965/blorp: Add a z_offset field to blorp_surface_info
The layer field is in terms of physical layers which isn't quite what the
sampler will want for 2-D MS array textures.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9a6df807e940f32025a109cbb00d52542ea336a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jun 28 14:10:49 2016 -0700
i965/blorp: Pass the Z component into all texture operations
Multisample array surfaces on IVB don't support the minimum array element
surface attribute so it needs to come through the sampler message. We may
as well just pass it through everything.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7abcdfbe1335e122b2a41f12732107b9197b56fd
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 19:30:32 2016 -0700
i965/blorp: Rework hiz rect alignment calculations
At the moment, the minify operation does nothing because
params.depth.view.base_level is always zero. However, as soon as we start
using actual base miplevels and array slices, we are going to need the
minification. Also, we only need to align the surface dimensions in the
case where we are operating on miplevel 0. Previously, it didn't matter
because it aligned on miplevel 0 and, for all other miplevels, the miptree
code guaranteed that the level was already aligned.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=871893cda2f550600a30ba336e8dda7d5ee6ffa5
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 17:30:35 2016 -0700
i965/blorp: Map 1-D render targets with DIM_LAYOUT_GEN4_2D as 2D on gen9
The sampling hardware can handle them ok. It just looks at the tiling to
determine whether it's the new gen9 1-D layout or the old one. The render
hardware isn't so smart.
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ecd97893686afc9ebeead14d2123aa02dad067f1
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 15:30:15 2016 -0700
i965/miptree: Fill out the isl_surf::usage field
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=560a92c4fd74171832ddf45910981a51c8d1418a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 1 14:25:59 2016 -0700
isl: Take the slice0_extent shortcut for interleaved MSAA
The shortcut works just fine for MSAA and the comment even says so.
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e02611276a51f7a555ec901f7e0aca2648ef7cb
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jul 1 14:21:44 2016 -0700
isl: Remove duplicate px->sa conversions
In all three cases, we start with width and height taken from
isl_surf::phys_slice0_extent_sa which is already in samples. There is no
need to do the conversion and doing so gives us an incorrect value.
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=603d5f76386dde1922d1251a5832e7ac6c2e6b63
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Jun 27 09:05:46 2016 -0700
i965/blorp: Use the isl_view from the blorp_surface_info
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c097160463c678c5544bfa8cda9cc3ef67361f4e
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Aug 17 01:06:36 2016 -0700
i965/blorp: Get rid of brw_blorp_surface_info::width/height
Instead, we manually mutate the surface size as needed.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2095f932ef9e7ef7307a39694a89ebd772a19868
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 20:48:20 2016 -0700
i965/blorp: Move surface offset calculations into a helper
The helper does a full transformation on the surface to turn it into a new
2-D single-layer single-level surface representing the original layer and
level in memory.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=90ab43d1bbb825cef6fe9acd04a1e8e18cddb372
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 20:57:41 2016 -0700
i965/blorp: Use ISL to compute image offsets
For the moment, we still call the old miptree function; we just assert that
the two are equal.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba88a9622dbbad5bf2bca7858f91dcf192d7439b
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Jun 24 15:00:31 2016 -0700
isl: Add functions for computing surface offsets in samples
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6c75df083a65f2525fa366396c1ac8b7e6298eb
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 21:50:22 2016 -0700
isl: Fix get_image_offset_sa_gen4_2d for multisample surfaces
The function takes a logical array layer but was assuming it was a physical
array layer. While we'er here, we also make it not assert-fail on gen9 3-D
surfaces.
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7997f4f95b59a48a579d5f57a26a89dbcc5b2c7f
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 20:11:46 2016 -0700
i965/blorp: Add an isl_view to blorp_surface_info
Eventually, this will be the actual view that gets passed into isl to
create the surface state. For now, we just use it for the format and the
swizzle.
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e046a4646090aa6b96664d128af70fd36cc2e065
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 18:40:08 2016 -0700
i965/blorp: Move intratile offset calculations out of surface state setup
Previously we multiplied full x/y offsets, resolved tile aligned buffer
offset and intra tile offset based on that. Now we let ISL to take into
account the msaa setting and we only multiply the resolved intra tile
offsets.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=27a58615d3c35aefd7d94457ca175facb309073c
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 17:06:37 2016 -0700
i965/blorp: Refactor interleaved multisample destination handling
We put all of the code for fake IMS together. This requires moving a bit
of the program key setup code further down so that it gets the right values
out of the final surface.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c25caa318b70e603a11441d5459a0b55fbca0a2
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 16:27:17 2016 -0700
i965/blorp: Get rid of brw_blorp_surface_info::array_layout
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=09879eff30ad4501bf72c1f3d0a45779be0235a6
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 15:50:18 2016 -0700
i965/blorp: Use isl_msaa_layout instead of intel_msaa_layout
We also remove brw_blorp_surface_info::msaa_layout.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2a1bdb3c524f0a25bc311b1025e257f6b16cfaa
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 15:17:15 2016 -0700
i965/blorp: Use the ISL aux_layout for deciding whether to do an MCS fetch
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=28b0ad890c5d99092bcff5a38a9491b0716d014d
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 11:00:59 2016 -0700
i965/blorp: Get rid of brw_blorp_surface_info::num_samples
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa6c058ac41c21071ec7011a332313b9c2e63840
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 11:35:50 2016 -0700
i965/blorp: Make sample count asserts a bit more lazy
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa4117a9e45928289ba193506b377d06d1e09584
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Jun 22 16:46:20 2016 -0700
i965/blorp: Get rid of brw_blorp_surface_info::map_stencil_as_y_tiled
Now that we're carrying around the isl_surf, we can just modify it
directly instead of passing an extra bit around.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=801189e1994a0daa96ff64b9f27a2e14b19cb446
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Jun 22 16:41:58 2016 -0700
i965/blorp: Remove compute_tile_offsets
We have a handy little function is ISL that does exactly the same thing.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b82de88008ddfef051eeccfbc4b36e0e7d47daf3
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Jun 22 15:33:44 2016 -0700
i965/blorp: Create the isl_surf up-front
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ffeb5f67ac46ec53d3c960d883e45d95080f0cf8
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Thu Jun 23 15:32:57 2016 -0700
i965/blorp/clear: Initialize surface info after allocating an MCS
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1666d029aa3c7dc3fc4337c1ef583553a0e217c6
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Jun 28 14:20:15 2016 -0700
isl/state: Use a valid alignment for 1-D textures
The alignment we use doesn't matter (see the comment) but it should at
least be an alignment we can represent with the enums.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0aa0b397695b9001d5e962622909f9546e2a6836
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Jun 22 16:13:42 2016 -0700
i965/miptree: Remove the stencil_as_y_tiled parameter from get_tile_masks
It's only used to stomp the tiling to Y and it's only used by blorp so
there's no reason why blorp can't do it itself.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=573f6ffd04be3380721dcca6d607b3490b7a118c
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Jun 22 16:37:54 2016 -0700
isl: Fix the parameter names for get_intratile_offset
It's been in elements for a while but, for whatever reason, the parameter
names in the header file never got updated.
Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
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