Mesa (master): vc4: Switch to using the intrinsic accessors.
Eric Anholt
anholt at kemper.freedesktop.org
Fri Aug 19 20:13:40 UTC 2016
Module: Mesa
Branch: master
Commit: c30b22c421d2139135519449a68bf3120710a552
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c30b22c421d2139135519449a68bf3120710a552
Author: Eric Anholt <eric at anholt.net>
Date: Thu Aug 4 14:42:14 2016 -0700
vc4: Switch to using the intrinsic accessors.
The const_index[] values have always felt magic, and this documents them a
bit better.
---
src/gallium/drivers/vc4/vc4_nir_lower_blend.c | 7 ++++---
src/gallium/drivers/vc4/vc4_nir_lower_io.c | 26 +++++++++++++++-----------
src/gallium/drivers/vc4/vc4_program.c | 19 ++++++++++---------
3 files changed, 29 insertions(+), 23 deletions(-)
diff --git a/src/gallium/drivers/vc4/vc4_nir_lower_blend.c b/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
index 8cad4b7..93a3572 100644
--- a/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
+++ b/src/gallium/drivers/vc4/vc4_nir_lower_blend.c
@@ -60,7 +60,7 @@ vc4_nir_get_dst_color(nir_builder *b, int sample)
nir_intrinsic_instr_create(b->shader,
nir_intrinsic_load_input);
load->num_components = 1;
- load->const_index[0] = VC4_NIR_TLB_COLOR_READ_INPUT + sample;
+ nir_intrinsic_set_base(load, VC4_NIR_TLB_COLOR_READ_INPUT + sample);
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &load->instr);
@@ -609,7 +609,7 @@ vc4_nir_store_sample_mask(struct vc4_compile *c, nir_builder *b,
nir_intrinsic_instr *intr =
nir_intrinsic_instr_create(c->s, nir_intrinsic_store_output);
intr->num_components = 1;
- intr->const_index[0] = sample_mask->data.driver_location;
+ nir_intrinsic_set_base(intr, sample_mask->data.driver_location);
intr->src[0] = nir_src_for_ssa(val);
intr->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
@@ -685,7 +685,8 @@ vc4_nir_lower_blend_block(nir_block *block, struct vc4_compile *c)
nir_variable *output_var = NULL;
nir_foreach_variable(var, &c->s->outputs) {
- if (var->data.driver_location == intr->const_index[0]) {
+ if (var->data.driver_location ==
+ nir_intrinsic_base(intr)) {
output_var = var;
break;
}
diff --git a/src/gallium/drivers/vc4/vc4_nir_lower_io.c b/src/gallium/drivers/vc4/vc4_nir_lower_io.c
index e55f77c..85f31f3 100644
--- a/src/gallium/drivers/vc4/vc4_nir_lower_io.c
+++ b/src/gallium/drivers/vc4/vc4_nir_lower_io.c
@@ -172,7 +172,7 @@ vc4_nir_lower_vertex_attr(struct vc4_compile *c, nir_builder *b,
{
b->cursor = nir_before_instr(&intr->instr);
- int attr = intr->const_index[0];
+ int attr = nir_intrinsic_base(intr);
enum pipe_format format = c->vs_key->attr_formats[attr];
uint32_t attr_size = util_format_get_blocksize(format);
@@ -195,7 +195,8 @@ vc4_nir_lower_vertex_attr(struct vc4_compile *c, nir_builder *b,
nir_intrinsic_instr_create(c->s,
nir_intrinsic_load_input);
intr_comp->num_components = 1;
- intr_comp->const_index[0] = intr->const_index[0] * 4 + i;
+ nir_intrinsic_set_base(intr_comp,
+ nir_intrinsic_base(intr) * 4 + i);
intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
nir_builder_instr_insert(b, &intr_comp->instr);
@@ -233,16 +234,16 @@ vc4_nir_lower_fs_input(struct vc4_compile *c, nir_builder *b,
{
b->cursor = nir_before_instr(&intr->instr);
- if (intr->const_index[0] >= VC4_NIR_TLB_COLOR_READ_INPUT &&
- intr->const_index[0] < (VC4_NIR_TLB_COLOR_READ_INPUT +
- VC4_MAX_SAMPLES)) {
+ if (nir_intrinsic_base(intr) >= VC4_NIR_TLB_COLOR_READ_INPUT &&
+ nir_intrinsic_base(intr) < (VC4_NIR_TLB_COLOR_READ_INPUT +
+ VC4_MAX_SAMPLES)) {
/* This doesn't need any lowering. */
return;
}
nir_variable *input_var = NULL;
nir_foreach_variable(var, &c->s->inputs) {
- if (var->data.driver_location == intr->const_index[0]) {
+ if (var->data.driver_location == nir_intrinsic_base(intr)) {
input_var = var;
break;
}
@@ -264,7 +265,8 @@ vc4_nir_lower_fs_input(struct vc4_compile *c, nir_builder *b,
nir_intrinsic_instr *intr_comp =
nir_intrinsic_instr_create(c->s, nir_intrinsic_load_input);
intr_comp->num_components = 1;
- intr_comp->const_index[0] = intr->const_index[0] * 4 + i;
+ nir_intrinsic_set_base(intr_comp,
+ nir_intrinsic_base(intr) * 4 + i);
intr_comp->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&intr_comp->instr, &intr_comp->dest, 1, 32, NULL);
@@ -300,7 +302,7 @@ vc4_nir_lower_output(struct vc4_compile *c, nir_builder *b,
{
nir_variable *output_var = NULL;
nir_foreach_variable(var, &c->s->outputs) {
- if (var->data.driver_location == intr->const_index[0]) {
+ if (var->data.driver_location == nir_intrinsic_base(intr)) {
output_var = var;
break;
}
@@ -319,7 +321,7 @@ vc4_nir_lower_output(struct vc4_compile *c, nir_builder *b,
(output_var->data.location == FRAG_RESULT_COLOR ||
output_var->data.location == FRAG_RESULT_DATA0 ||
output_var->data.location == FRAG_RESULT_SAMPLE_MASK)) {
- intr->const_index[0] *= 4;
+ nir_intrinsic_set_base(intr, nir_intrinsic_base(intr) * 4);
return;
}
@@ -338,7 +340,8 @@ vc4_nir_lower_output(struct vc4_compile *c, nir_builder *b,
nir_intrinsic_instr *intr_comp =
nir_intrinsic_instr_create(c->s, nir_intrinsic_store_output);
intr_comp->num_components = 1;
- intr_comp->const_index[0] = intr->const_index[0] * 4 + i;
+ nir_intrinsic_set_base(intr_comp,
+ nir_intrinsic_base(intr) * 4 + i);
assert(intr->src[0].is_ssa);
intr_comp->src[0] =
@@ -374,7 +377,8 @@ vc4_nir_lower_uniform(struct vc4_compile *c, nir_builder *b,
/* Convert the uniform offset to bytes. If it happens to be a
* constant, constant-folding will clean up the shift for us.
*/
- intr_comp->const_index[0] = (intr->const_index[0] * 16 + i * 4);
+ nir_intrinsic_set_base(intr_comp,
+ nir_intrinsic_base(intr) * 16 + i * 4);
intr_comp->src[0] =
nir_src_for_ssa(nir_ishl(b, intr->src[0].ssa,
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 33721f1..8c92981 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -71,7 +71,7 @@ static struct qreg
indirect_uniform_load(struct vc4_compile *c, nir_intrinsic_instr *intr)
{
struct qreg indirect_offset = ntq_get_src(c, intr->src[0], 0);
- uint32_t offset = intr->const_index[0];
+ uint32_t offset = nir_intrinsic_base(intr);
struct vc4_compiler_ubo_range *range = NULL;
unsigned i;
for (i = 0; i < c->num_uniform_ranges; i++) {
@@ -116,7 +116,8 @@ nir_ssa_def *vc4_nir_get_state_uniform(struct nir_builder *b,
nir_intrinsic_instr *intr =
nir_intrinsic_instr_create(b->shader,
nir_intrinsic_load_uniform);
- intr->const_index[0] = (VC4_NIR_STATE_UNIFORM_OFFSET + contents) * 4;
+ nir_intrinsic_set_base(intr,
+ (VC4_NIR_STATE_UNIFORM_OFFSET + contents) * 4);
intr->num_components = 1;
intr->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&intr->instr, &intr->dest, 1, 32, NULL);
@@ -1562,7 +1563,7 @@ ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
assert(instr->num_components == 1);
const_offset = nir_src_as_const_value(instr->src[0]);
if (const_offset) {
- offset = instr->const_index[0] + const_offset->u32[0];
+ offset = nir_intrinsic_base(instr) + const_offset->u32[0];
assert(offset % 4 == 0);
/* We need dwords */
offset = offset / 4;
@@ -1586,8 +1587,8 @@ ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
for (int i = 0; i < instr->num_components; i++) {
ntq_store_dest(c, &instr->dest, i,
qir_uniform(c, QUNIFORM_USER_CLIP_PLANE,
- instr->const_index[0] * 4 +
- i));
+ nir_intrinsic_ucp_id(instr) *
+ 4 + i));
}
break;
@@ -1610,12 +1611,12 @@ ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
assert(instr->num_components == 1);
const_offset = nir_src_as_const_value(instr->src[0]);
assert(const_offset && "vc4 doesn't support indirect inputs");
- if (instr->const_index[0] >= VC4_NIR_TLB_COLOR_READ_INPUT) {
+ if (nir_intrinsic_base(instr) >= VC4_NIR_TLB_COLOR_READ_INPUT) {
assert(const_offset->u32[0] == 0);
/* Reads of the per-sample color need to be done in
* order.
*/
- int sample_index = (instr->const_index[0] -
+ int sample_index = (nir_intrinsic_base(instr) -
VC4_NIR_TLB_COLOR_READ_INPUT);
for (int i = 0; i <= sample_index; i++) {
if (c->color_reads[i].file == QFILE_NULL) {
@@ -1626,7 +1627,7 @@ ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
ntq_store_dest(c, &instr->dest, 0,
c->color_reads[sample_index]);
} else {
- offset = instr->const_index[0] + const_offset->u32[0];
+ offset = nir_intrinsic_base(instr) + const_offset->u32[0];
ntq_store_dest(c, &instr->dest, 0,
c->inputs[offset]);
}
@@ -1635,7 +1636,7 @@ ntq_emit_intrinsic(struct vc4_compile *c, nir_intrinsic_instr *instr)
case nir_intrinsic_store_output:
const_offset = nir_src_as_const_value(instr->src[1]);
assert(const_offset && "vc4 doesn't support indirect outputs");
- offset = instr->const_index[0] + const_offset->u32[0];
+ offset = nir_intrinsic_base(instr) + const_offset->u32[0];
/* MSAA color outputs are the only case where we have an
* output that's not lowered to being a store of a single 32
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