Mesa (master): i965/blit: Fix the src dimension sanity check in miptree_copy

Jason Ekstrand jekstrand at kemper.freedesktop.org
Tue Dec 13 23:49:34 UTC 2016


Module: Mesa
Branch: master
Commit: 157971e450c34ec430c295ff922c2e597294aba3
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=157971e450c34ec430c295ff922c2e597294aba3

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Dec  6 12:03:11 2016 -0800

i965/blit: Fix the src dimension sanity check in miptree_copy

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Cc: "13.0" <mesa-stable at lists.freedesktop.org>

---

 src/mesa/drivers/dri/i965/intel_blit.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 03a35ee..21a16e1 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -419,10 +419,18 @@ intel_miptree_copy(struct brw_context *brw,
       GLuint bw, bh;
       _mesa_get_format_block_size(src_mt->format, &bw, &bh);
 
+      /* Compressed textures need not have dimensions that are a multiple of
+       * the block size.  Rectangles in compressed textures do need to be a
+       * multiple of the block size.  The one exception is that the right and
+       * bottom edges may be at the right or bottom edge of the miplevel even
+       * if it's not aligned.
+       */
       assert(src_x % bw == 0);
       assert(src_y % bh == 0);
-      assert(src_width % bw == 0);
-      assert(src_height % bh == 0);
+      assert(src_width % bw == 0 ||
+             src_x + src_width == minify(src_mt->logical_width0, src_level));
+      assert(src_height % bh == 0 ||
+             src_y + src_height == minify(src_mt->logical_height0, src_level));
 
       src_x /= (int)bw;
       src_y /= (int)bh;




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