Mesa (master): radv: bump texel offsets to align with radeonsi

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 14737bcdd5cc5ebd6694df82917959bc8badce91
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=14737bcdd5cc5ebd6694df82917959bc8badce91

Author: Dave Airlie <airlied at redhat.com>
Date:   Thu Dec 22 10:35:46 2016 +1000

radv: bump texel offsets to align with radeonsi

it appears from the amdgpu-pro results the hw can do more,
but let's just align with radeonsi for now.

No CTS regressions.

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied at redhat.com>

---

 src/amd/vulkan/radv_device.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 7c6dee6..5f90940 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -496,10 +496,10 @@ void radv_GetPhysicalDeviceProperties(
 		.minTexelBufferOffsetAlignment            = 1,
 		.minUniformBufferOffsetAlignment          = 4,
 		.minStorageBufferOffsetAlignment          = 4,
-		.minTexelOffset                           = -8,
-		.maxTexelOffset                           = 7,
-		.minTexelGatherOffset                     = -8,
-		.maxTexelGatherOffset                     = 7,
+		.minTexelOffset                           = -32,
+		.maxTexelOffset                           = 31,
+		.minTexelGatherOffset                     = -32,
+		.maxTexelGatherOffset                     = 31,
 		.minInterpolationOffset                   = 0, /* FIXME */
 		.maxInterpolationOffset                   = 0, /* FIXME */
 		.subPixelInterpolationOffsetBits          = 0, /* FIXME */