Mesa (master): freedreno/ir3: rework varying slots (maybe??)

[Rob Clark]

Module: Mesa
Branch: master
Commit: 832dddcf91f168ab057cb5c7f6914b24ae6b864c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=832dddcf91f168ab057cb5c7f6914b24ae6b864c

Author: Rob Clark <robdclark at gmail.com>
Date:   Mon Nov 28 16:02:31 2016 -0500

freedreno/ir3: rework varying slots (maybe??)

See:
dEQP-GLES2.functional.shaders.swizzles.vector_swizzles.mediump_vec2_yyyy_fragment

if we only access (in FS) varying.y then it ends up in slot zero..  I'm
not sure the hw likes that..

Signed-off-by: Rob Clark <robdclark at gmail.com>

---

 src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index b0f40f1..a68e824 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -2499,7 +2499,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
 	actual_in = 0;
 	inloc = 0;
 	for (i = 0; i < so->inputs_count; i++) {
-		unsigned j, regid = ~0, compmask = 0;
+		unsigned j, regid = ~0, compmask = 0, maxcomp = 0;
 		so->inputs[i].ncomp = 0;
 		so->inputs[i].inloc = inloc;
 		for (j = 0; j < 4; j++) {
@@ -2512,14 +2512,19 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
 				if ((so->type == SHADER_FRAGMENT) && so->inputs[i].bary) {
 					/* assign inloc: */
 					assert(in->regs[1]->flags & IR3_REG_IMMED);
-					in->regs[1]->iim_val = inloc++;
+					in->regs[1]->iim_val = inloc + j;
+					maxcomp = j + 1;
 				}
 			}
 		}
-		if ((so->type == SHADER_FRAGMENT) && compmask && so->inputs[i].bary)
+		if ((so->type == SHADER_FRAGMENT) && compmask && so->inputs[i].bary) {
 			so->varying_in++;
+			so->inputs[i].compmask = (1 << maxcomp) - 1;
+			inloc += maxcomp;
+		} else {
+			so->inputs[i].compmask = compmask;
+		}
 		so->inputs[i].regid = regid;
-		so->inputs[i].compmask = compmask;
 	}
 
 	if (ctx->astc_srgb)