Mesa (master): isl/state: Add support for handling auxiliary surfaces

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 48ed8b6f26a40da40cb72b90cb52c9a653ff1e13
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=48ed8b6f26a40da40cb72b90cb52c9a653ff1e13

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Jun  3 16:37:19 2016 -0700

isl/state: Add support for handling auxiliary surfaces

Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Chad Versace <chad.versace at intel.com>

---

 src/intel/isl/isl.h               |  7 +++++++
 src/intel/isl/isl_surface_state.c | 43 +++++++++++++++++++++++++++++++++++++--
 2 files changed, 48 insertions(+), 2 deletions(-)

diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 5421c7b..b5884be 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -901,6 +901,13 @@ struct isl_surf_fill_state_info {
    uint32_t mocs;
 
    /**
+    * The auxilary surface or NULL if no auxilary surface is to be used.
+    */
+   const struct isl_surf *aux_surf;
+   enum isl_aux_usage aux_usage;
+   uint64_t aux_address;
+
+   /**
     * The clear color for this surface
     *
     * Valid values depend on hardware generation.
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index c65126d..fc7e1ba 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -84,6 +84,23 @@ static const uint32_t isl_to_gen_multisample_layout[] = {
    [ISL_MSAA_LAYOUT_ARRAY]          = MSFMT_MSS,
 };
 
+#if GEN_GEN >= 9
+static const uint32_t isl_to_gen_aux_mode[] = {
+   [ISL_AUX_USAGE_NONE] = AUX_NONE,
+   [ISL_AUX_USAGE_HIZ] = AUX_HIZ,
+   [ISL_AUX_USAGE_MCS] = AUX_CCS_D,
+   [ISL_AUX_USAGE_CCS_D] = AUX_CCS_D,
+   [ISL_AUX_USAGE_CCS_E] = AUX_CCS_E,
+};
+#elif GEN_GEN >= 8
+static const uint32_t isl_to_gen_aux_mode[] = {
+   [ISL_AUX_USAGE_NONE] = AUX_NONE,
+   [ISL_AUX_USAGE_HIZ] = AUX_HIZ,
+   [ISL_AUX_USAGE_MCS] = AUX_MCS,
+   [ISL_AUX_USAGE_CCS_D] = AUX_MCS,
+};
+#endif
+
 static uint8_t
 get_surftype(enum isl_surf_dim dim, isl_surf_usage_flags_t usage)
 {
@@ -353,10 +370,32 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
    s.SurfaceBaseAddress = info->address;
    s.MOCS = info->mocs;
 
+#if GEN_GEN >= 7
+   if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) {
+      struct isl_tile_info tile_info;
+      isl_surf_get_tile_info(dev, info->aux_surf, &tile_info);
+      uint32_t pitch_in_tiles =
+         info->aux_surf->row_pitch / tile_info.phys_extent_B.width;
+
 #if GEN_GEN >= 8
-   s.AuxiliarySurfaceMode = AUX_NONE;
+      assert(GEN_GEN >= 9 || info->aux_usage != ISL_AUX_USAGE_CCS_E);
+      s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
+      /* Auxiliary surfaces in ISL have compressed formats but the hardware
+       * doesn't expect our definition of the compression, it expects qpitch
+       * in units of samples on the main surface.
+       */
+      s.AuxiliarySurfaceQPitch =
+         isl_surf_get_array_pitch_sa_rows(info->aux_surf);
+      s.AuxiliarySurfaceBaseAddress = info->aux_address;
+      s.AuxiliarySurfaceMode = isl_to_gen_aux_mode[info->aux_usage];
 #else
-   s.MCSEnable = false;
+      assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
+             info->aux_usage == ISL_AUX_USAGE_CCS_D);
+      s.MCSBaseAddress = info->aux_address,
+      s.MCSSurfacePitch = pitch_in_tiles - 1;
+      s.MCSEnable = true;
+#endif
+   }
 #endif
 
 #if GEN_GEN >= 8