Mesa (master): i965: Rename brw_wm_barycentric_interp_mode to brw_barycentric_mode.
Kenneth Graunke
kwg at kemper.freedesktop.org
Sat Jul 16 00:51:19 UTC 2016
Module: Mesa
Branch: master
Commit: 783511e605160bcfc9132b6fbc83c8816262effd
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=783511e605160bcfc9132b6fbc83c8816262effd
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Mon Jul 11 16:24:12 2016 -0700
i965: Rename brw_wm_barycentric_interp_mode to brw_barycentric_mode.
brw_wm_barycentric_interp_mode is wordy, brw_barycentric_mode is less
typing and suffers from fewer line wrapping problems.
The enum values themselves don't really benefit from "WM" in the name,
either. Put "BARYCENTRIC" first instead of at the end and drop "WM".
Generated by:
for file in *.c *.cpp *.h; do sed -i \
-e 's/brw_wm_barycentric_interp_mode/brw_barycentric_mode/g' \
-e 's/BRW_WM_\([A-Z_]*\)_BARYCENTRIC/BRW_BARYCENTRIC_\1/g' \
-e 's/BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT/BRW_BARYCENTRIC_MODE_COUNT/g' \
$file;
done
with a few whitespace changes.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
---
src/mesa/drivers/dri/i965/brw_defines.h | 24 ++++++++--------
src/mesa/drivers/dri/i965/brw_fs.cpp | 34 +++++++++++------------
src/mesa/drivers/dri/i965/brw_fs.h | 4 +--
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 6 ++--
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 6 ++--
src/mesa/drivers/dri/i965/gen6_clip_state.c | 2 +-
6 files changed, 38 insertions(+), 38 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 740d03d..b5a259e 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -2533,19 +2533,19 @@ enum brw_pixel_shader_coverage_mask_mode {
# define GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1)
# define GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT 0
-enum brw_wm_barycentric_interp_mode {
- BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC = 0,
- BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC = 1,
- BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC = 2,
- BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC = 3,
- BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC = 4,
- BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC = 5,
- BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT = 6
+enum brw_barycentric_mode {
+ BRW_BARYCENTRIC_PERSPECTIVE_PIXEL = 0,
+ BRW_BARYCENTRIC_PERSPECTIVE_CENTROID = 1,
+ BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE = 2,
+ BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL = 3,
+ BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID = 4,
+ BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE = 5,
+ BRW_BARYCENTRIC_MODE_COUNT = 6
};
-#define BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS \
- ((1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC) | \
- (1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC) | \
- (1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC))
+#define BRW_BARYCENTRIC_NONPERSPECTIVE_BITS \
+ ((1 << BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL) | \
+ (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID) | \
+ (1 << BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE))
#define _3DSTATE_WM 0x7814 /* GEN6+ */
/* DW1: kernel pointer */
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 4a9c4ab..bc63b2c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1059,7 +1059,7 @@ fs_visitor::emit_fragcoord_interpolation()
bld.MOV(wpos, fs_reg(brw_vec8_grf(payload.source_depth_reg, 0)));
} else {
bld.emit(FS_OPCODE_LINTERP, wpos,
- this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC],
+ this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL],
interp_reg(VARYING_SLOT_POS, 2));
}
wpos = offset(wpos, bld, 1);
@@ -1075,23 +1075,23 @@ fs_visitor::emit_linterp(const fs_reg &attr, const fs_reg &interp,
glsl_interp_qualifier interpolation_mode,
bool is_centroid, bool is_sample)
{
- brw_wm_barycentric_interp_mode barycoord_mode;
+ brw_barycentric_mode barycoord_mode;
if (true) {
if (is_centroid) {
if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
- barycoord_mode = BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC;
+ barycoord_mode = BRW_BARYCENTRIC_PERSPECTIVE_CENTROID;
else
- barycoord_mode = BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC;
+ barycoord_mode = BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID;
} else if (is_sample) {
if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
- barycoord_mode = BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC;
+ barycoord_mode = BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE;
else
- barycoord_mode = BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC;
+ barycoord_mode = BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE;
} else {
if (interpolation_mode == INTERP_QUALIFIER_SMOOTH)
- barycoord_mode = BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+ barycoord_mode = BRW_BARYCENTRIC_PERSPECTIVE_PIXEL;
else
- barycoord_mode = BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+ barycoord_mode = BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL;
}
}
return bld.emit(FS_OPCODE_LINTERP, attr,
@@ -5547,13 +5547,13 @@ fs_visitor::setup_fs_payload_gen6()
/* R2: only for 32-pixel dispatch.*/
/* R3-26: barycentric interpolation coordinates. These appear in the
- * same order that they appear in the brw_wm_barycentric_interp_mode
+ * same order that they appear in the brw_barycentric_mode
* enum. Each set of coordinates occupies 2 registers if dispatch width
* == 8 and 4 registers if dispatch width == 16. Coordinates only
* appear if they were enabled using the "Barycentric Interpolation
* Mode" bits in WM_STATE.
*/
- for (int i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) {
+ for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) {
if (barycentric_interp_modes & (1 << i)) {
payload.barycentric_coord_reg[i] = payload.num_regs;
payload.num_regs += 2;
@@ -6324,7 +6324,7 @@ fs_visitor::run_cs()
/**
* Return a bitfield where bit n is set if barycentric interpolation mode n
- * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
+ * (see enum brw_barycentric_mode) is needed by the fragment shader.
*/
static unsigned
brw_compute_barycentric_interp_modes(const struct brw_device_info *devinfo,
@@ -6352,28 +6352,28 @@ brw_compute_barycentric_interp_modes(const struct brw_device_info *devinfo,
if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) {
if (is_centroid) {
barycentric_interp_modes |=
- 1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC;
+ 1 << BRW_BARYCENTRIC_NONPERSPECTIVE_CENTROID;
} else if (is_sample) {
barycentric_interp_modes |=
- 1 << BRW_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC;
+ 1 << BRW_BARYCENTRIC_NONPERSPECTIVE_SAMPLE;
}
if ((!is_centroid && !is_sample) ||
devinfo->needs_unlit_centroid_workaround) {
barycentric_interp_modes |=
- 1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
+ 1 << BRW_BARYCENTRIC_NONPERSPECTIVE_PIXEL;
}
} else if (interp_qualifier == INTERP_QUALIFIER_SMOOTH) {
if (is_centroid) {
barycentric_interp_modes |=
- 1 << BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC;
+ 1 << BRW_BARYCENTRIC_PERSPECTIVE_CENTROID;
} else if (is_sample) {
barycentric_interp_modes |=
- 1 << BRW_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC;
+ 1 << BRW_BARYCENTRIC_PERSPECTIVE_SAMPLE;
}
if ((!is_centroid && !is_sample) ||
devinfo->needs_unlit_centroid_workaround) {
barycentric_interp_modes |=
- 1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
+ 1 << BRW_BARYCENTRIC_PERSPECTIVE_PIXEL;
}
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index ca977d4..ddd66ca 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -350,7 +350,7 @@ public:
uint8_t dest_depth_reg;
uint8_t sample_pos_reg;
uint8_t sample_mask_in_reg;
- uint8_t barycentric_coord_reg[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
+ uint8_t barycentric_coord_reg[BRW_BARYCENTRIC_MODE_COUNT];
uint8_t local_invocation_id_reg;
/** The number of thread payload registers the hardware will supply. */
@@ -364,7 +364,7 @@ public:
fs_reg pixel_y;
fs_reg wpos_w;
fs_reg pixel_w;
- fs_reg delta_xy[BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT];
+ fs_reg delta_xy[BRW_BARYCENTRIC_MODE_COUNT];
fs_reg shader_start_time;
fs_reg userplane[MAX_CLIP_PLANES];
fs_reg final_gs_vertex_count;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index d5c54e0..9dc3a0d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -563,14 +563,14 @@ fs_visitor::assign_regs(bool allow_spilling, bool spill_all)
* second operand of a PLN instruction needs to be an
* even-numbered register, so we have a special register class
* wm_aligned_pairs_class to handle this case. pre-GEN6 always
- * uses this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] as the
+ * uses this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL] as the
* second operand of a PLN instruction (since it doesn't support
* any other interpolation modes). So all we need to do is find
* that register and set it to the appropriate class.
*/
if (compiler->fs_reg_sets[rsi].aligned_pairs_class >= 0 &&
- this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC].file == VGRF &&
- this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC].nr == i) {
+ this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL].file == VGRF &&
+ this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL].nr == i) {
c = compiler->fs_reg_sets[rsi].aligned_pairs_class;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 17eba8d..156a630 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -213,9 +213,9 @@ fs_visitor::emit_interpolation_setup_gen4()
abld = bld.annotate("compute pixel deltas from v0");
- this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC] =
+ this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL] =
vgrf(glsl_type::vec2_type);
- const fs_reg &delta_xy = this->delta_xy[BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC];
+ const fs_reg &delta_xy = this->delta_xy[BRW_BARYCENTRIC_PERSPECTIVE_PIXEL];
const fs_reg xstart(negate(brw_vec1_grf(1, 0)));
const fs_reg ystart(negate(brw_vec1_grf(1, 1)));
@@ -308,7 +308,7 @@ fs_visitor::emit_interpolation_setup_gen6()
this->wpos_w = vgrf(glsl_type::float_type);
abld.emit(SHADER_OPCODE_RCP, this->wpos_w, this->pixel_w);
- for (int i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) {
+ for (int i = 0; i < BRW_BARYCENTRIC_MODE_COUNT; ++i) {
uint8_t reg = payload.barycentric_coord_reg[i];
this->delta_xy[i] = fs_reg(brw_vec16_grf(reg, 0));
}
diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c
index b079ffd..8fa3e04 100644
--- a/src/mesa/drivers/dri/i965/gen6_clip_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c
@@ -46,7 +46,7 @@ upload_clip_state(struct brw_context *brw)
/* BRW_NEW_FS_PROG_DATA */
if (brw->wm.prog_data->barycentric_interp_modes &
- BRW_WM_NONPERSPECTIVE_BARYCENTRIC_BITS) {
+ BRW_BARYCENTRIC_NONPERSPECTIVE_BITS) {
dw2 |= GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE;
}
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