Mesa (master): nir: Share destination rewriting and replacement code in IO lowering.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: cdfc05ea6e8c87876cdbf588aa8e03d70f3da4bb
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cdfc05ea6e8c87876cdbf588aa8e03d70f3da4bb

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Jul 12 02:30:02 2016 -0700

nir: Share destination rewriting and replacement code in IO lowering.

Both loads and atomics had identical code to rewrite destinations,
and all cases had the same two lines to replace instructions.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

---

 src/compiler/nir/nir_lower_io.c | 44 ++++++++++++++++++-----------------------
 1 file changed, 19 insertions(+), 25 deletions(-)

diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c
index 45cc671..3a8587a 100644
--- a/src/compiler/nir/nir_lower_io.c
+++ b/src/compiler/nir/nir_lower_io.c
@@ -289,6 +289,8 @@ nir_lower_io_block(nir_block *block,
                              per_vertex ? &vertex_index : NULL,
                              state->type_size);
 
+      nir_intrinsic_instr *replacement;
+
       switch (intrin->intrinsic) {
       case nir_intrinsic_load_var: {
          nir_intrinsic_instr *load =
@@ -311,18 +313,7 @@ nir_lower_io_block(nir_block *block,
 
          load->src[per_vertex ? 1 : 0] = nir_src_for_ssa(offset);
 
-         if (intrin->dest.is_ssa) {
-            nir_ssa_dest_init(&load->instr, &load->dest,
-                              intrin->num_components,
-                              intrin->dest.ssa.bit_size, NULL);
-            nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
-                                     nir_src_for_ssa(&load->dest.ssa));
-         } else {
-            nir_dest_copy(&load->dest, &intrin->dest, state->mem_ctx);
-         }
-
-         nir_instr_insert_before(&intrin->instr, &load->instr);
-         nir_instr_remove(&intrin->instr);
+         replacement = load;
          break;
       }
 
@@ -348,8 +339,7 @@ nir_lower_io_block(nir_block *block,
 
          store->src[per_vertex ? 2 : 1] = nir_src_for_ssa(offset);
 
-         nir_instr_insert_before(&intrin->instr, &store->instr);
-         nir_instr_remove(&intrin->instr);
+         replacement = store;
          break;
       }
 
@@ -379,24 +369,28 @@ nir_lower_io_block(nir_block *block,
             nir_src_copy(&atomic->src[i+1], &intrin->src[i], atomic);
          }
 
+         replacement = atomic;
+         break;
+      }
+
+      default:
+         break;
+      }
+
+      if (nir_intrinsic_infos[intrin->intrinsic].has_dest) {
          if (intrin->dest.is_ssa) {
-            nir_ssa_dest_init(&atomic->instr, &atomic->dest,
-                              intrin->dest.ssa.num_components,
+            nir_ssa_dest_init(&replacement->instr, &replacement->dest,
+                              intrin->num_components,
                               intrin->dest.ssa.bit_size, NULL);
             nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
-                                     nir_src_for_ssa(&atomic->dest.ssa));
+                                     nir_src_for_ssa(&replacement->dest.ssa));
          } else {
-            nir_dest_copy(&atomic->dest, &intrin->dest, state->mem_ctx);
+            nir_dest_copy(&replacement->dest, &intrin->dest, state->mem_ctx);
          }
-
-         nir_instr_insert_before(&intrin->instr, &atomic->instr);
-         nir_instr_remove(&intrin->instr);
-         break;
       }
 
-      default:
-         break;
-      }
+      nir_instr_insert_before(&intrin->instr, &replacement->instr);
+      nir_instr_remove(&intrin->instr);
    }
 
    return true;