Mesa (master): i965/miptree: Enforce that height == 1 for 1-D array textures

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: d4d505d0b04b9bce7c346fe0710df9921861edd6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4d505d0b04b9bce7c346fe0710df9921861edd6

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Mon Jul 18 18:46:43 2016 -0700

i965/miptree: Enforce that height == 1 for 1-D array textures

The GL API and mesa internals do this differently than we do.  In GL, there
is no depth parameter for 1-D arrays and height is used.  In the i965
miptree code we do the sane thing and make height == 1 and use depth for
number of slices.  This makes for a mismatch every time we create a 1-D
array texture from GL.  Instead of actually solving this problem, we just
said "1-D is hard, let's make sure it works no matter which way we pass the
parameters" and called it a day.

This commit fixes the one GL -> i965 transition point where we weren't
already handling 1-D array textures to do the right thing and then replaces
the magic fixup code with an assert that you're doing the right thing.

Signed-off-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
Reviewed-by: Chris Forbes <chrisforbes at google.com>
Cc: "12.0 11.2 11.1" <mesa-stable at lists.freedesktop.org>

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 22 +++-------------------
 src/mesa/drivers/dri/i965/intel_tex.c         |  2 ++
 2 files changed, 5 insertions(+), 19 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index c705c98..10158fe 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -364,25 +364,8 @@ intel_miptree_create_layout(struct brw_context *brw,
        _mesa_get_format_name(format),
        first_level, last_level, depth0, mt);
 
-   if (target == GL_TEXTURE_1D_ARRAY) {
-      /* For a 1D Array texture the OpenGL API will treat the height0
-       * parameter as the number of array slices. For Intel hardware, we treat
-       * the 1D array as a 2D Array with a height of 1.
-       *
-       * So, when we first come through this path to create a 1D Array
-       * texture, height0 stores the number of slices, and depth0 is 1. In
-       * this case, we want to swap height0 and depth0.
-       *
-       * Since some miptrees will be created based on the base miptree, we may
-       * come through this path and see height0 as 1 and depth0 being the
-       * number of slices. In this case we don't need to do the swap.
-       */
-      assert(height0 == 1 || depth0 == 1);
-      if (height0 > 1) {
-         depth0 = height0;
-         height0 = 1;
-      }
-   }
+   if (target == GL_TEXTURE_1D_ARRAY)
+      assert(height0 == 1);
 
    mt->target = target;
    mt->format = format;
@@ -1048,6 +1031,7 @@ intel_get_image_dims(struct gl_texture_image *image,
        * as a 2D Array with a height of 1. So, here we want to swap image
        * height and depth.
        */
+      assert(image->Depth == 1);
       *width = image->Width;
       *height = 1;
       *depth = image->Height;
diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c
index 8c32fe3..d3e24f4 100644
--- a/src/mesa/drivers/dri/i965/intel_tex.c
+++ b/src/mesa/drivers/dri/i965/intel_tex.c
@@ -141,6 +141,8 @@ intel_alloc_texture_storage(struct gl_context *ctx,
        !intel_miptree_match_image(intel_texobj->mt, first_image) ||
        intel_texobj->mt->last_level != levels - 1) {
       intel_miptree_release(&intel_texobj->mt);
+
+      intel_get_image_dims(first_image, &width, &height, &depth);
       intel_texobj->mt = intel_miptree_create(brw, texobj->Target,
                                               first_image->TexFormat,
                                               0, levels - 1,