Mesa (master): i965: Set render state for lossless compressed
Topi Pohjolainen
tpohjola at kemper.freedesktop.org
Thu May 12 17:19:26 UTC 2016
Module: Mesa
Branch: master
Commit: cd9e97a02085b68799fd347a1e8e4b7aa6668334
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cd9e97a02085b68799fd347a1e8e4b7aa6668334
Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date: Tue Feb 23 11:02:35 2016 +0200
i965: Set render state for lossless compressed
v2: Add support for blorp and removed the support for meta
v3 (Ben): Add assertion on compressed non-fast clear - must
be partial clear.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
Reviewed-by: Ben Widawsky <ben at bwidawsk.net>
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 3 +++
src/mesa/drivers/dri/i965/brw_blorp_clear.cpp | 7 +++++++
src/mesa/drivers/dri/i965/brw_draw.c | 7 ++++++-
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index c8eb87f..9eeb89d 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -2232,4 +2232,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
brw_blorp_exec(brw, ¶ms);
intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_layer);
+
+ if (intel_miptree_is_lossless_compressed(brw, dst_mt))
+ dst_mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED;
}
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
index d6c846a..23a7594 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp
@@ -344,6 +344,13 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
* redundant clears.
*/
irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR;
+ } else if (intel_miptree_is_lossless_compressed(brw, irb->mt)) {
+ /* Compressed buffers can be cleared also using normal rep-clear. In
+ * such case they bahave such as if they were drawn using normal 3D
+ * render pipeline, and we simply mark the mcs as dirty.
+ */
+ assert(partial_clear);
+ irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED;
}
return true;
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index dcbb681..bb963f4 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -386,8 +386,13 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw)
struct intel_renderbuffer *irb =
intel_renderbuffer(fb->_ColorDrawBuffers[i]);
- if (irb)
+ if (irb) {
brw_render_cache_set_add_bo(brw, irb->mt->bo);
+
+ if (intel_miptree_is_lossless_compressed(brw, irb->mt)) {
+ irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_UNRESOLVED;
+ }
+ }
}
}
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