Mesa (master): 30 new commits

Samuel Iglesias Gonsálvez samuelig at kemper.freedesktop.org
Mon May 16 08:44:29 UTC 2016


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=71465179fc45820dabf933146fb16f044a7363d7
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Feb 23 12:15:36 2016 +0100

    i965: Expose OpenGL 4.0 for gen8+
    
    ARB_gpu_shader_fp64 was the only feature missing.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b1d21e11590738333889fbfd1e04be330052f016
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Feb 23 12:14:11 2016 +0100

    docs: Mark ARB_gpu_shader_fp64 as done for i965/gen8+
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=309d285c6b1fb7f9e19b687f182608f15d466476
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Feb 23 12:14:52 2016 +0100

    i965: Enable ARB_gpu_shader_fp64 for gen8+
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=58f304defe804a6f01b0b961997ecfe61fe00d34
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon May 9 09:43:56 2016 +0200

    i965/tes/scalar: Fix load input for doubles
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=61197b8d5dd963bd9288385308feb3f0dcaf6742
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon May 9 15:23:34 2016 +0200

    i965/tcs/scalar: fix store output for doubles
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cda3435ea85904a17c5c23a7c044e59ba0181b96
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon May 9 10:31:50 2016 +0200

    i965/tcs/scalar: fix load input for doubles
    
    v2: do not write to the original indirect_offset since that is
        an expression that could be used somewhere else (Ken)
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=66192b3c16b09fa7ba97574103fc3d883b3cbfdb
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon May 9 10:14:48 2016 +0200

    i965/fs: fix nir_intrinsic_store_output for doubles
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3cce67aff09a4c248e9a69a8b05a63ac6b3e4878
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon May 9 10:14:18 2016 +0200

    i965/fs: fix number of output components for doubles
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0297f1021a962314cf6ebafcc16c0ff048e23171
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon May 9 15:21:25 2016 +0200

    i965/vec4: handle doubles in type_size_vec4()
    
    The scalar backend uses this to check URB input sizes.
    
    v2: Removed redundant break after return (Curro)
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c6d147373cbdefef5945b00626bb62bb03198ca
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Jan 26 10:30:39 2016 +0100

    i965/fs: support doubles with shared variable stores
    
    This is pretty much the same we do with SSBOs.
    
    v2: do not shuffle in-place, it is not safe since the original 64-bit data
        could be used after the write, instead use a temporary like we do
        for SSBO stores (Iago)
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=943f9442bf7943a992730e642e91ed874d50790c
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Jan 25 13:42:19 2016 +0100

    i965/fs: support doubles with ssbo stores
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9aa66aa516c100d5476ee966f428aaf743d786c
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Jan 25 13:37:50 2016 +0100

    i965/fs: add shuffle_64bit_data_for_32bit_write helper
    
    This does the inverse operation of shuffle_32bit_load_result_to_64bit_data
    and we will use it when we need to write 64-bit data in the layout expected
    by untyped write messages.
    
    v2 (curro):
    - Use subscript() instead of stride()
    - Assert on the input types rather than silently retyping.
    - Use offset() instead of horiz_offset(), drop the multiplier definition.
    - Drop the temporary vgrf and force_writemask_all.
    - Make component_i const.
    - Move to brw_fs_nir.cpp
    
    v3 (curro):
    - Pass dst and src by reference.
    - Simplify allocation of tmp register.
    - Move to brw_fs_nir.cpp.
    - Get rid of the temporary.
    
    v3 (Iago):
    - Check that the src and dst regions do not overlap, since that would
      typically be a bug in the caller.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=33f7ec18ac399719df06ab7031cb43965e6793be
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Jan 25 10:58:59 2016 +0100

    i965/fs: support doubles with SSBO loads
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8aa01ac596fc0722058e10808c8141533c3fd1fe
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Thu May 5 12:58:19 2016 +0200

    i965/fs: support doubles with shared variable loads
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6eab06b866916d4fd52adf7b8bb6113948a3811a
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Thu May 5 12:55:44 2016 +0200

    i965/fs: Add do_untyped_vector_read helper
    
    We are going to need the same logic for anything that reads
    doubles via untyped messages (CS shared variables and SSBOs). Add a
    helper function with that logic so that we can reuse it.
    
    v2:
    - Make this a static function instead of a method of fs_visitor (Iago)
    - We only support types with a size of 4 or 8 (Curro)
    - Avoid retypes by using a separate vgrf for the packed result (Curro)
    - Put dst parameter before source parameters (Curro)
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b86d4780ed203b2a22afba5f95c73b15165a7259
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Wed Jan 13 10:17:10 2016 +0100

    i965/fs: support doubles with UBO loads
    
    UBO loads with constant offset use the UNIFORM_PULL_CONSTANT_LOAD
    instruction, which reads 16 bytes (a vec4) of data from memory. For dvec
    types this only provides components x and y. Thus, if we are reading
    more than 2 components we need to issue a second load at offset+16 to
    read the next 16-byte chunk with components w and z.
    
    UBO loads with non-constant offset emit a load for each component
    in the vector (and rely in CSE to fix redundant loads), so we only
    need to consider the size of the data type when computing the offset
    of each element in a vector.
    
    v2 (Sam):
    - Adapt the code to use component() (Curro).
    
    v3 (Sam):
    - Use type_sz(dest.type) in VARYING_PULL_CONSTANT_LOAD() call (Curro).
    - Add asserts to ensure std140 vector alignment rules are followed
      (Curro).
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=58f1804c4f38b76c20872d6887b7b5e6029e0454
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Jan 18 13:09:31 2016 +0100

    i965/fs: fix pull constant load component selection for doubles
    
    UNIFORM_PULL_CONSTANT_LOAD is used to load a contiguous vec4 starting at a
    constant offset that is 16-byte aligned. If we need to access an unaligned
    offset we emit a load with an aligned offset and use the remaining constant
    offset to select the component into the vec4 result that we are interested
    in. This component must be computed in units of the type size, since that
    is what fs_reg::set_smear expects.
    
    This patch does this change in the two places where we use this message:
    In demote_pull_constants when we lower uniform access with constant offset
    into the pull constant buffer and in UBO loads with constant offset.
    
    v2 (Sam):
    - Fix set_smear() in fs_visitor::lower_constant_loads(), take into account
    source type instead and remove MAX2 (Curro).
    - Improve changes to nir_intrinsic_load_ubo case in nir_emit_intrinsic()
    (Curro).
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=71fd4942d10128afde9f0a7f33b587c29cd9011c
Author: Francisco Jerez <currojerez at riseup.net>
Date:   Wed May 11 12:54:26 2016 -0700

    i965/fs: Fix and document component().
    
    This fixes a number of bugs of component() by reimplementing it in
    terms of horiz_offset(): Handling of base registers starting at a
    non-zero subreg_offset, handling of strided registers and overflow of
    subreg_offset into reg_offset.
    
    Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e209134f717078fb6c1d4a6d048b4aba22c87993
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Thu Jan 14 08:55:28 2016 +0100

    i965/fs: Fix fs_visitor::VARYING_PULL_CONSTANT_LOAD for doubles
    
    v2 (Curro):
       - Assert on scale == 1 when shuffling 64-bit data.
       - Remove type_slots, use type_sz(vec4_result.type) instead.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=50b7676dc46bae39c5e9b779828ef4fb2e1fbefc
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Fri Jan 22 14:00:38 2016 +0100

    i965/fs: add shuffle_32bit_load_result_to_64bit_data helper
    
    There will be a few places where we need to shuffle the result of a 32-bit
    load into valid 64-bit data, so extract this logic into a separate helper
    that we can reuse.
    
    v2 (Curro):
    - Use subscript() instead of stride()
    - Assert on the input types rather than retyping.
    - Use offset() instead of horiz_offset(), drop the multiplier definition.
    - Don't use  force_writemask_all.
    - Mark component_i as const.
    - Make the function name lower case.
    
    v3 (Curro):
    - Pass src and dst by reference.
    - Move to brw_fs_nir.cpp
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d9c461e53440182de42d0a16ec66ad7f5c3b00a
Author: Francisco Jerez <currojerez at riseup.net>
Date:   Tue May 3 21:26:13 2016 -0700

    i965/fs: Stop using the LOAD_PAYLOAD instruction in lower_simd_width.
    
    Instead of using the LOAD_PAYLOAD instruction (emitted through the
    emit_transpose() helper that is no longer useful and this commit
    removes) which had to be marked force_writemask_all in some cases,
    emit a series of moves to apply proper channel enable signals to the
    destination.  Until now lower_simd_width() had mainly been used to
    lower things that invariably had a basic block-local temporary as
    destination so it didn't seem like a big deal, but I found it to be
    the reason for several Piglit regressions in my SIMD32 branch and
    Igalia discovered the same issue independently while working on FP64
    support.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9149fd681735b02e421b8cd9e7cea92f039d8590
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Fri Mar 11 08:46:36 2016 +0100

    i965/fs: fix copy/constant propagation regioning checks
    
    We were not accounting for subreg_offset in the check for the start
    of the region.
    
    Also, fs_reg::regs_read() already takes the stride into account, so we
    should not multiply its result by the stride again. This was making
    copy-propagation fail to copy-propagate cases that would otherwise be
    safe to copy-propagate. Again, this was observed in fp64 code, since
    there we use stride > 1 often.
    
    v2 (Sam):
    - Rename function and add comment (Jason, Curro).
    - Assert that register files and number are the same (Jason).
    - Fix code to take into account the assumption that src.subreg_offset
    is strictly less than the reg_offset unit (Curro).
    - Don't pass the registers by value to the function, use
    'const fs_reg &' instead (Curro).
    - Remove obsolete comment in the commit log (Curro).
    
    v3 (Sam):
    - Remove the assert and put the condition in the return (Curro).
    - Fix function name (Curro).
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=789eecdb79d899a070507355ecb4dc137600f700
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Tue Apr 12 13:53:24 2016 +0200

    i965/fs: fix copy propagation from load payload
    
    We were not considering the case where the load payload is writing to
    a destination with a reg_offset > 0.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=cf375a3333e54a01462f192202d609436e5fbec8
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Fri Mar 11 14:35:07 2016 +0100

    i965/fs: fix copy propagation of partially invalidated entries
    
    We were not invalidating entries with a src that reads more than one register
    when we find writes that overwrite any register read by entry->src after
    the first. This leads to incorrect copy propagation because we re-use
    entries from the ACP that have been partially invalidated. Same thing for
    entries with a dst that writes to more than one register.
    
    v2 (Sam):
    - Improve code by defining regions_overlap() and using it instead of a
    loop (Curro).
    
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea1ef49a16dc429c50ece388e92bf206ccf282a7
Author: Francisco Jerez <currojerez at riseup.net>
Date:   Tue May 10 16:03:36 2016 -0700

    i965/fs: Reindent register offset calculation of try_copy_propagate().
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0fb19806c069cbf34aaf02e77f5ae37a9e4cf3b0
Author: Francisco Jerez <currojerez at riseup.net>
Date:   Tue May 10 16:01:56 2016 -0700

    i965/fs: Simplify and fix register offset calculation of try_copy_propagate().
    
    try_copy_propagate() was special-casing UNIFORM registers (the
    BAD_FILE, ARF and FIXED_GRF cases are dead, see the assertion at the
    top of the function) and then failing to take into account the
    possibility of the instruction reading from a non-zero offset of the
    destination of the copy.  The VGRF/ATTR handling takes it into account
    correctly, and there is no reason we couldn't use the exact same logic
    for the UNIFORM file aside from the fact that uniforms represent
    reg_offset in different units.  We can work around that easily by
    defining an additional constant with the right unit reg_offset is
    expressed in.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7aa53cd725cc2287fc206033120e08cde74cde2a
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Wed Mar 23 12:02:21 2016 +0100

    i965/fs: disallow type change in copy-propagation if types have different sizes
    
    Because the semantics of source modifiers are type-dependent, the type of the
    original source of the copy must be kept unmodified while propagating it into
    some instruction, which implies that we need to have the guarantee that the
    meaning of the instruction is going to remain the same after we have changed
    the types. Whenthe size of the new type is different from the size of the old
    type the new and old instructions cannot possibly be equivalent because the new
    instruction will be reading more data than the old one was.
    
    Prevents that we turn this:
    
    load_payload(8) vgrf17:DF, |vgrf4+0.0|:DF 1sthalf
    mov(8) vgrf18:DF, vgrf17:DF 1sthalf
    load_payload(8) vgrf5:DF, vgrf18:DF, vgrf20:DF NoMask 1sthalf WE_all
    load_payload(8) vgrf21:UD, vgrf5+0.4<2>:UD 1sthalf
    mov(8) vgrf22:UD, vgrf21:UD 1sthalf
    
    into:
    
    load_payload(8) vgrf17:DF, |vgrf4+0.0|:DF 1sthalf
    mov(8) vgrf18:DF, |vgrf4+0.0|:DF 1sthalf
    load_payload(8) vgrf5:DF, |vgrf4+0.0|:DF, |vgrf4+2.0|:DF NoMask 1sthalf WE_all
    load_payload(8) vgrf21:UD, vgrf5+0.4<2>:UD 1sthalf
    mov(8) vgrf22:DF, |vgrf4+0.4|<2>:DF 1sthalf
    
    where the semantics of the last instruccion have changed.
    
    v2 (Curro):
      - Update commit log and add comment to explain the problem better.
      - Simplify the condition.
    
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac9b966aac4d0276de889990f3b170e0b939c542
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Mon Jan 18 10:44:20 2016 +0100

    i965/fs: Fix copy propagation of load payload for double operands
    
    Specifically, consider the size of the data type of the operand to compute
    the number of registers written.
    
    v2 (Sam):
    - Fix line width (Jordan).
    - Add an assert (Jordan).
    - Use REG_SIZE in the calculation of regs_written (Curro)
    
    v3 (Sam):
    - Fix assert and calculation of regs_written (Curro).
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Francisco Jerez <currojerez at riseup.net>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=70dc19f9d628f0459db93466fbf65af1bfe75af1
Author: Francisco Jerez <currojerez at riseup.net>
Date:   Mon Apr 25 15:40:05 2016 -0700

    i965/fs: Fix propagation of copies with strided source.
    
    This has likely been broken since we started propagating copies not
    matching the offset of the instruction exactly
    (1728e74957a62b1b4b9fbb62a7de2c12b77c8a75).  The copy source stride
    needs to be taken into account to find out the offset at the origin
    that corresponds to the offset at the destination of the copy which is
    being read by the instruction.  This has led to program miscompilation
    on both my SIMD32 branch and Igalia's FP64 branch.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=17decd940c1e105506db74e8539a77db271adbc5
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Wed Apr 6 10:27:14 2016 +0200

    i965/fs: fix subreg_offset overflow in byte_offset()
    
    This can happen if the register already has a non-zero subreg_offset
    when byte_offset() is called.
    
    v2 (Sam):
    - Refactor byte_offset() (Jordan).
    
    Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>




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