Mesa (master): i965/gen9: Allow sampling with hiz when supported

[Lionel Landwerlin]

Module: Mesa
Branch: master
Commit: 112a2ba2763f14351de33501d2731dbdcab48658
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=112a2ba2763f14351de33501d2731dbdcab48658

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Fri Oct 21 16:50:50 2016 +0100

i965/gen9: Allow sampling with hiz when supported

For gen9+ this will indicate when we should allow hiz based sampling
during rendering.

Improves performance in :
  - Synmark's OglDeferred by 2.2% (n=20)
  - Synmark's OglShMapPcf by 0.44% (n=20)

v2 by Ben: Add spec reference, and make it fix with some of the changes made on
the previous patches
Change the check from mt->aux_buf to mt->num_samples. The presence of an aux_buf
isn't enough to determine there isn't a HiZ buffer to use.

v3: It seems all depth surface end up with num_samples = 0 by default,
    so allow sampling from depth HiZ if num_samples <= 1. (Lionel)
    Allow sampling from HiZ only if all LOD are available from the HiZ
    buffer. (Lionel)

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com> (v1)
Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com> (v2)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com> (v3)
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 29 ++++++++++++++++++++++++++-
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index a44fce0..6c81ffb 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2022,7 +2022,34 @@ intel_miptree_sample_with_hiz(struct brw_context *brw,
       return false;
    }
 
-   return false;
+   if (!mt->hiz_buf) {
+      return false;
+   }
+
+   /* It seems the hardware won't fallback to the depth buffer if some of the
+    * mipmap levels aren't available in the HiZ buffer. So we need all levels
+    * of the texture to be HiZ enabled.
+    */
+   for (unsigned level = mt->first_level; level <= mt->last_level; ++level) {
+      if (!intel_miptree_level_has_hiz(mt, level))
+         return false;
+   }
+
+   /* If compressed multisampling is enabled, then we use it for the auxiliary
+    * buffer instead.
+    *
+    * From the BDW PRM (Volume 2d: Command Reference: Structures
+    *                   RENDER_SURFACE_STATE.AuxiliarySurfaceMode):
+    *
+    *  "If this field is set to AUX_HIZ, Number of Multisamples must be
+    *   MULTISAMPLECOUNT_1, and Surface Type cannot be SURFTYPE_3D.
+    *
+    * There is no such blurb for 1D textures, but there is sufficient evidence
+    * that this is broken on SKL+.
+    */
+   return (mt->num_samples <= 1 &&
+           mt->target != GL_TEXTURE_3D &&
+           mt->target != GL_TEXTURE_1D /* gen9+ restriction */);
 }
 
 /**