Mesa (master): swr: disable logic op when the rt format is float or srgb

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: f037afb701a8df8a646414e986b3561c8a798e05
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f037afb701a8df8a646414e986b3561c8a798e05

Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Tue Nov  8 17:30:03 2016 -0500

swr: disable logic op when the rt format is float or srgb

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Reviewed-by: Tim Rowley <timothy.o.rowley at intel.com>

---

 src/gallium/drivers/swr/swr_state.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/src/gallium/drivers/swr/swr_state.cpp b/src/gallium/drivers/swr/swr_state.cpp
index 451ab5a..ede475a 100644
--- a/src/gallium/drivers/swr/swr_state.cpp
+++ b/src/gallium/drivers/swr/swr_state.cpp
@@ -1305,6 +1305,12 @@ swr_update_derived(struct pipe_context *pipe,
                    &ctx->blend->compileState[target],
                    sizeof(compileState.blendState));
 
+            const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format);
+            if (compileState.blendState.logicOpEnable &&
+                ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) {
+               compileState.blendState.logicOpEnable = false;
+            }
+
             if (compileState.blendState.blendEnable == false &&
                 compileState.blendState.logicOpEnable == false &&
                 ctx->depth_stencil->alpha.enabled == 0) {