Mesa (master): vc4: Fix register class handling of DDX/DDY arguments.

[Eric Anholt]

Module: Mesa
Branch: master
Commit: 977d8b526b983c8d19df00af224033389f8ab7c8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=977d8b526b983c8d19df00af224033389f8ab7c8

Author: Eric Anholt <eric at anholt.net>
Date:   Fri Nov 11 14:04:42 2016 -0800

vc4: Fix register class handling of DDX/DDY arguments.

I had this exactly backwards, but apparently the piglit tests were all
landing in r0-r3 anyway.

Cc: "13.0" <mesa-stable at lists.freedesktop.org>

---

 src/gallium/drivers/vc4/vc4_register_allocate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/vc4/vc4_register_allocate.c b/src/gallium/drivers/vc4/vc4_register_allocate.c
index 6c99b05..ab343ee 100644
--- a/src/gallium/drivers/vc4/vc4_register_allocate.c
+++ b/src/gallium/drivers/vc4/vc4_register_allocate.c
@@ -247,7 +247,7 @@ vc4_register_allocate(struct vc4_context *vc4, struct vc4_compile *c)
 
                 case QOP_ROT_MUL:
                         assert(inst->src[0].file == QFILE_TEMP);
-                        class_bits[inst->src[0].index] &= ~CLASS_BIT_R0_R3;
+                        class_bits[inst->src[0].index] &= CLASS_BIT_R0_R3;
                         break;
 
                 default: