Mesa (master): gm107/ir: optimize 32-bit CONST load to mov
Samuel Pitoiset
hakzsam at kemper.freedesktop.org
Sat Nov 26 18:15:16 UTC 2016
Module: Mesa
Branch: master
Commit: 8fdb800bdaa28f4ca563829f70e8b187f867c0ac
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fdb800bdaa28f4ca563829f70e8b187f867c0ac
Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date: Fri Nov 25 12:25:58 2016 +0100
gm107/ir: optimize 32-bit CONST load to mov
This is not allowed for indirect accesses because the source
GPR might be erased by a subsequent instruction (WaR hazard)
if we don't emit a read dep bar.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
.../drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp | 16 ++++++++++++++++
.../drivers/nouveau/codegen/nv50_ir_lowering_gm107.h | 1 +
2 files changed, 17 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
index 84ef4e0..371ebae 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
@@ -61,6 +61,19 @@ GM107LegalizeSSA::handlePFETCH(Instruction *i)
i->setSrc(1, NULL);
}
+void
+GM107LegalizeSSA::handleLOAD(Instruction *i)
+{
+ if (i->src(0).getFile() != FILE_MEMORY_CONST)
+ return;
+ if (i->src(0).isIndirect(0))
+ return;
+ if (typeSizeof(i->dType) != 4)
+ return;
+
+ i->op = OP_MOV;
+}
+
bool
GM107LegalizeSSA::visit(Instruction *i)
{
@@ -68,6 +81,9 @@ GM107LegalizeSSA::visit(Instruction *i)
case OP_PFETCH:
handlePFETCH(i);
break;
+ case OP_LOAD:
+ handleLOAD(i);
+ break;
default:
break;
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
index 81749bf..d0737be 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
@@ -21,6 +21,7 @@ private:
virtual bool visit(Instruction *);
void handlePFETCH(Instruction *);
+ void handleLOAD(Instruction *);
};
} // namespace nv50_ir
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