Mesa (master): i965: get uses texture gather from nir info

[Timothy Arceri]

Module: Mesa
Branch: master
Commit: ee829cba8ed7941631e214ae8557c5af9fa667b4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ee829cba8ed7941631e214ae8557c5af9fa667b4

Author: Timothy Arceri <timothy.arceri at collabora.com>
Date:   Wed Oct  5 14:57:21 2016 +1100

i965: get uses texture gather from nir info

This is a step towards dropping the GLSL IR version of
do_set_program_inouts() in i965 and moving towards native nir support.

This is important because we want to eventually convert to nir and
use its optimisations passes before we can call this GLSL IR pass.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>

---

 src/mesa/drivers/dri/i965/brw_shader.cpp         |  2 +-
 src/mesa/drivers/dri/i965/brw_wm.c               |  5 +++--
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 13 +++++++------
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 17e95bc..ed81563 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1212,7 +1212,7 @@ brw_assign_common_binding_table_offsets(gl_shader_stage stage,
       stage_prog_data->binding_table.shader_time_start = 0xd0d0d0d0;
    }
 
-   if (prog->UsesGather) {
+   if (prog->nir->info.uses_texture_gather) {
       if (devinfo->gen >= 8) {
          stage_prog_data->binding_table.gather_texture_start =
             stage_prog_data->binding_table.texture_start;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 5da1a36..b0167d2 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -356,7 +356,8 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
          /* gather4's channel select for green from RG32F is broken; requires
           * a shader w/a on IVB; fixable with just SCS on HSW.
           */
-         if (brw->gen == 7 && !brw->is_haswell && prog->UsesGather) {
+         if (brw->gen == 7 && !brw->is_haswell &&
+             prog->nir->info.uses_texture_gather) {
             if (img->InternalFormat == GL_RG32F)
                key->gather_channel_quirk_mask |= 1 << s;
          }
@@ -364,7 +365,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx,
          /* Gen6's gather4 is broken for UINT/SINT; we treat them as
           * UNORM/FLOAT instead and fix it in the shader.
           */
-         if (brw->gen == 6 && prog->UsesGather) {
+         if (brw->gen == 6 && prog->nir->info.uses_texture_gather) {
             key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
          }
 
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 8d5d9a2..6ea3b04 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -30,6 +30,7 @@
   */
 
 
+#include "compiler/nir/nir.h"
 #include "main/context.h"
 #include "main/blend.h"
 #include "main/mtypes.h"
@@ -1289,15 +1290,15 @@ brw_update_texture_surfaces(struct brw_context *brw)
     * allows the surface format to be overriden for only the
     * gather4 messages. */
    if (brw->gen < 8) {
-      if (vs && vs->UsesGather)
+      if (vs && vs->nir->info.uses_texture_gather)
          update_stage_texture_surfaces(brw, vs, &brw->vs.base, true, 0);
-      if (tcs && tcs->UsesGather)
+      if (tcs && tcs->nir->info.uses_texture_gather)
          update_stage_texture_surfaces(brw, tcs, &brw->tcs.base, true, 0);
-      if (tes && tes->UsesGather)
+      if (tes && tes->nir->info.uses_texture_gather)
          update_stage_texture_surfaces(brw, tes, &brw->tes.base, true, 0);
-      if (gs && gs->UsesGather)
+      if (gs && gs->nir->info.uses_texture_gather)
          update_stage_texture_surfaces(brw, gs, &brw->gs.base, true, 0);
-      if (fs && fs->UsesGather)
+      if (fs && fs->nir->info.uses_texture_gather)
          update_stage_texture_surfaces(brw, fs, &brw->wm.base, true, 0);
    }
 
@@ -1342,7 +1343,7 @@ brw_update_cs_texture_surfaces(struct brw_context *brw)
     * gather4 messages.
     */
    if (brw->gen < 8) {
-      if (cs && cs->UsesGather)
+      if (cs && cs->nir->info.uses_texture_gather)
          update_stage_texture_surfaces(brw, cs, &brw->cs.base, true, 0);
    }