Mesa (master): gallium/radeon: add barrier_flags to r600_common_screen

Nicolai Hähnle nh at kemper.freedesktop.org
Thu Sep 29 09:24:02 UTC 2016


Module: Mesa
Branch: master
Commit: 8e4de009303e4755c833f9d96737d023119a08f6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e4de009303e4755c833f9d96737d023119a08f6

Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Thu Sep 15 16:24:17 2016 +0200

gallium/radeon: add barrier_flags to r600_common_screen

There are driver-specific context flags for barriers that are not covered
by the Gallium barrier interfaces.

The R600 settings of these flags may not be optimal, but we're not going
to use them yet anyway.

Reviewed-by: Edward O'Callaghan <funfunctor at folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/r600/r600_pipe.c          |  6 ++++++
 src/gallium/drivers/radeon/r600_pipe_common.h | 12 ++++++++++++
 src/gallium/drivers/radeonsi/si_pipe.c        |  5 +++++
 3 files changed, 23 insertions(+)

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 271b7e1..635b76f 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -680,6 +680,12 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
 	rscreen->b.has_cp_dma = rscreen->b.info.drm_minor >= 27 &&
 			      !(rscreen->b.debug_flags & DBG_NO_CP_DMA);
 
+	rscreen->b.barrier_flags.cp_to_L2 =
+		R600_CONTEXT_INV_VERTEX_CACHE |
+		R600_CONTEXT_INV_TEX_CACHE |
+		R600_CONTEXT_INV_CONST_CACHE;
+	rscreen->b.barrier_flags.compute_to_L2 = R600_CONTEXT_PS_PARTIAL_FLUSH;
+
 	rscreen->global_pool = compute_memory_pool_new(rscreen);
 
 	/* Create the auxiliary context. This must be done last. */
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index d9f22e4..dd33eab 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -415,6 +415,18 @@ struct r600_common_screen {
 	 */
 	unsigned			dirty_tex_descriptor_counter;
 
+	struct {
+		/* Context flags to set so that all writes from earlier jobs
+		 * in the CP are seen by L2 clients.
+		 */
+		unsigned cp_to_L2;
+
+		/* Context flags to set so that all writes from earlier
+		 * compute jobs are seen by L2 clients.
+		 */
+		unsigned compute_to_L2;
+	} barrier_flags;
+
 	void (*query_opaque_metadata)(struct r600_common_screen *rscreen,
 				      struct r600_texture *rtex,
 				      struct radeon_bo_metadata *md);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 8f9e6f5..730be9d 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -818,6 +818,11 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
 		HAVE_LLVM < 0x0308 ||
 		(sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0;
 
+	sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 |
+					    SI_CONTEXT_INV_VMEM_L1 |
+					    SI_CONTEXT_INV_GLOBAL_L2;
+	sscreen->b.barrier_flags.compute_to_L2 = SI_CONTEXT_CS_PARTIAL_FLUSH;
+
 	if (debug_get_bool_option("RADEON_DUMP_SHADERS", false))
 		sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
 




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