Mesa (master): radv: fix order of the guardband register emission.

[Dave Airlie]

Module: Mesa
Branch: master
Commit: 03a67fbbf7847cbdcc26b3bd86ee43e09a55cce9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=03a67fbbf7847cbdcc26b3bd86ee43e09a55cce9

Author: Dave Airlie <airlied at redhat.com>
Date:   Sun Apr  2 14:36:51 2017 +1000

radv: fix order of the guardband register emission.

y is vert, x is horiz.

Noticed in visual inspection compared to radeonsi.

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied at redhat.com>

---

 src/amd/vulkan/si_cmd_buffer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index e847dcff03..e176abe386 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -627,10 +627,10 @@ si_write_scissors(struct radeon_winsys_cs *cs, int first,
 	}
 
 	radeon_set_context_reg_seq(cs, R_028BE8_PA_CL_GB_VERT_CLIP_ADJ, 4);
-	radeon_emit(cs, fui(guardband_x));
-	radeon_emit(cs, fui(1.0));
 	radeon_emit(cs, fui(guardband_y));
 	radeon_emit(cs, fui(1.0));
+	radeon_emit(cs, fui(guardband_x));
+	radeon_emit(cs, fui(1.0));
 }
 
 static inline unsigned