Mesa (master): radeonsi: optimization barriers to work around LLVM deficiencies

Nicolai Hähnle nh at kemper.freedesktop.org
Wed Apr 5 13:33:01 UTC 2017


Module: Mesa
Branch: master
Commit: 8b13b11f11ccb540831999a24701d2c4bd8dfe1c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b13b11f11ccb540831999a24701d2c4bd8dfe1c

Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Fri Mar 31 18:42:51 2017 +0200

radeonsi: optimization barriers to work around LLVM deficiencies

Notably, llvm.amdgcn.readfirstlane and llvm.amdgcn.icmp may be hoisted
out of loops or if/else branches in cases like

  if (cond) {
    v = readFirstInvocationARB(x);
    ... use v ...
  } else {
    v = readFirstInvocationARB(x);
    ... use v ...
  }
===>
  v = readFirstInvocationARB(x);
  if (cond) {
    ... use v ...
  } else {
    ... use v ...
  }

The optimization barrier is a heavy hammer to stop that until LLVM
is taught the semantics of the intrinsic properly.

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/radeonsi/si_shader.c | 16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 082e29111b..3622acb318 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3131,7 +3131,6 @@ static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
  * Optionally, a value can be passed through the inline assembly to prevent
  * LLVM from hoisting calls to ReadNone functions.
  */
-#if 0 /* unused currently */
 static void emit_optimization_barrier(struct si_shader_context *ctx,
 				      LLVMValueRef *pvgpr)
 {
@@ -3165,7 +3164,6 @@ static void emit_optimization_barrier(struct si_shader_context *ctx,
 		*pvgpr = vgpr;
 	}
 }
-#endif
 
 /* Combine these with & instead of |. */
 #define NOOP_WAITCNT 0xf7f
@@ -5176,8 +5174,13 @@ static LLVMValueRef si_emit_ballot(struct si_shader_context *ctx,
 		LLVMConstInt(ctx->i32, LLVMIntNE, 0)
 	};
 
-	if (LLVMTypeOf(value) != ctx->i32)
-		args[0] = LLVMBuildBitCast(gallivm->builder, value, ctx->i32, "");
+	/* We currently have no other way to prevent LLVM from lifting the icmp
+	 * calls to a dominating basic block.
+	 */
+	emit_optimization_barrier(ctx, &args[0]);
+
+	if (LLVMTypeOf(args[0]) != ctx->i32)
+		args[0] = LLVMBuildBitCast(gallivm->builder, args[0], ctx->i32, "");
 
 	return lp_build_intrinsic(gallivm->builder,
 				  "llvm.amdgcn.icmp.i32",
@@ -5282,6 +5285,11 @@ static void read_lane_emit(
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	LLVMBuilderRef builder = ctx->gallivm.builder;
 
+	/* We currently have no other way to prevent LLVM from lifting the icmp
+	 * calls to a dominating basic block.
+	 */
+	emit_optimization_barrier(ctx, &emit_data->args[0]);
+
 	for (unsigned i = 0; i < emit_data->arg_count; ++i) {
 		emit_data->args[i] = LLVMBuildBitCast(builder, emit_data->args[i],
 						      ctx->i32, "");




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