Mesa (master): etnaviv: avoid using invalid TS

[Lucas Stach]

Module: Mesa
Branch: master
Commit: 37622ecc795e655ab0264c44dbe6188d9d9d3813
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=37622ecc795e655ab0264c44dbe6188d9d9d3813

Author: Lucas Stach <l.stach at pengutronix.de>
Date:   Mon Nov 21 12:25:29 2016 +0100

etnaviv: avoid using invalid TS

The TS is only valid after it has been initialized by a fast
clear, so it should not be taken into account when blitting
resources that haven't been cleared. Also the blit itself
invalidates the destination TS, as it's not updated and will
retain data from the previous rendering after the blit.

Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
Reviewed-by: Wladimir J. van der Laan <laanwj at gmail.com>

---

 src/gallium/drivers/etnaviv/etnaviv_clear_blit.c | 6 +++++-
 src/gallium/drivers/etnaviv/etnaviv_resource.h   | 1 +
 src/gallium/drivers/etnaviv/etnaviv_surface.c    | 1 +
 3 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
index 4a03d8294f..d555884d3f 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
@@ -119,6 +119,7 @@ etna_blit_clear_color(struct pipe_context *pctx, struct pipe_surface *dst,
          ctx->framebuffer.TS_MEM_CONFIG |= VIVS_TS_MEM_CONFIG_COLOR_AUTO_DISABLE;
       }
 
+      surf->level->ts_valid = true;
       ctx->dirty |= ETNA_DIRTY_TS;
    } else if (unlikely(new_clear_value != surf->level->clear_value)) { /* Queue normal RS clear for non-TS surfaces */
       /* If clear color changed, re-generate stored command */
@@ -178,6 +179,7 @@ etna_blit_clear_zs(struct pipe_context *pctx, struct pipe_surface *dst,
          ctx->framebuffer.TS_MEM_CONFIG |= VIVS_TS_MEM_CONFIG_DEPTH_AUTO_DISABLE;
       }
 
+      surf->level->ts_valid = true;
       ctx->dirty |= ETNA_DIRTY_TS;
    } else {
       if (unlikely(new_clear_value != surf->level->clear_value)) { /* Queue normal RS clear for non-TS surfaces */
@@ -468,7 +470,8 @@ etna_try_rs_blit(struct pipe_context *pctx,
    }
 
    /* Set up color TS to source surface before blit, if needed */
-   if (src->levels[blit_info->src.level].ts_size) {
+   if (src->levels[blit_info->src.level].ts_size &&
+       src->levels[blit_info->src.level].ts_valid) {
       struct etna_reloc reloc;
       unsigned ts_offset =
          src_lev->ts_offset + blit_info->src.box.z * src_lev->ts_layer_stride;
@@ -521,6 +524,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
    etna_submit_rs_state(ctx, &copy_to_screen);
    resource_written(ctx, &dst->base);
    dst->seqno++;
+   dst->levels[blit_info->dst.level].ts_valid = false;
 
    return TRUE;
 
diff --git a/src/gallium/drivers/etnaviv/etnaviv_resource.h b/src/gallium/drivers/etnaviv/etnaviv_resource.h
index a9b288e708..a6c6a78269 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_resource.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_resource.h
@@ -46,6 +46,7 @@ struct etna_resource_level {
    uint32_t ts_layer_stride;
    uint32_t ts_size;
    uint32_t clear_value; /* clear value of resource level (mainly for TS) */
+   bool ts_valid;
 };
 
 /* status of queued up but not flushed reads and write operations.
diff --git a/src/gallium/drivers/etnaviv/etnaviv_surface.c b/src/gallium/drivers/etnaviv/etnaviv_surface.c
index a0013a48bc..db4846aa06 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_surface.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_surface.c
@@ -107,6 +107,7 @@ etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
 
       surf->surf.ts_offset += layer_offset;
       surf->surf.ts_size -= layer_offset;
+      surf->surf.ts_valid = false;
 
       surf->ts_reloc.bo = rsc->ts_bo;
       surf->ts_reloc.offset = surf->surf.ts_offset;