Mesa (17.0): 28 new commits
Emil Velikov
evelikov at kemper.freedesktop.org
Fri Apr 14 18:41:57 UTC 2017
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e032a434fab936d9f9c47d52f3a8e0fcd50ae0f
Author: Fabio Estevam <festevam at gmail.com>
Date: Sat Mar 4 19:07:27 2017 -0300
loader: Move non-error message to debug level
Currently when running mesa on imx6 the following loader warnings
are seen:
MESA-LOADER: device is not located on the PCI bus
MESA-LOADER: device is not located on the PCI bus
MESA-LOADER: device is not located on the PCI bus
Using display 0x1920948 with EGL version 1.4
As this is not an error message, change it to debug level in
order to have a cleaner log output.
Signed-off-by: Fabio Estevam <festevam at gmail.com>
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
(cherry picked from commit 78c57726335fe22cb4579bcf562d2394adc234b5)
Nominated-by: Rob Clark <robdclark at gmail.com> (IRC)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7d3c71d649348e0454c9a1a180cfeefcbea6452
Author: Alex Smith <asmith at feralinteractive.com>
Date: Thu Mar 30 21:03:58 2017 +0200
radv: Invalidate L2 for TRANSFER_WRITE barriers
CP DMA and PKT3_WRITE_DATA (in CmdUpdateBuffer) don't (currently) write
through L2. Therefore, to make these writes visible to later accesses
we must invalidate L2 rather than just writing it back, to avoid the
possibility that stale data is read through L2.
Signed-off-by: Alex Smith <asmith at feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Cc: "17.0" <mesa-stable at lists.freedesktop.org>
[Bas: patch is a backport for 17.0 of the cherry-pick below]
(cherry picked from commit bc5d587a80b64fb3e0a5ea8067e6317fbca2bbc5)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6114f0c4e619a1192062dc8dce91a67032faeb1
Author: Julien Isorce <jisorce at oblong.com>
Date: Wed Mar 15 17:40:25 2017 +0000
radeon_drm_bo: explicitly check return value of drmCommandWriteRead
CID 1313492
Signed-off-by: Julien Isorce <jisorce at oblong.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit 521860b2a92bab6394546e6af8709c07e2292033)
Nominated-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f51d37f733f8b6ecbe444fbf2536cd403d3f285
Author: Julien Isorce <jisorce at oblong.com>
Date: Mon Feb 27 13:42:17 2017 +0000
radeon: initialize hole variable before calling container_of
Like in a few other places in that radeon_drm_bo.c file.
CID 715739.
Signed-off-by: Julien Isorce <jisorce at oblong.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit ce27b27c38acd5a92cf45e7ddc2434f2c04191ee)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99515
Nominated-by: Mauro Rossi <issor.oruam at gmail.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b2bcb6826ff8855e96117c9523821336a3be88a
Author: Julien Isorce <julien.isorce at gmail.com>
Date: Fri Mar 10 17:20:56 2017 +0000
winsys/radeon: check null return from radeon_cs_create_fence in cs_flush
Follow-up of patch:
"radeon_cs_create_fence: check null return from radeon_winsys_bo_create"
radeon_drm_cs_flush
radeon_cs_create_fence
radeon_winsys_bo_create
Signed-off-by: Julien Isorce <jisorce at oblong.com>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit d08c0930af8aaef5bdf80df618bb906e0b349830)
[Emil Velikov: resolve trivial conflicts]
Nominated-by: Emil Velikov <emil.velikov at collabora.com>
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Conflicts:
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=99468c236f09211fcc4716efd400c039079c9a40
Author: Julien Isorce <julien.isorce at gmail.com>
Date: Fri Mar 10 17:16:05 2017 +0000
winsys/radeon: check null in radeon_cs_create_fence
Fixes the following segmentation fault:
radeon_drm_cs_add_buffer (bo=0x0) at radeon_drm_cs.c
-> if (!bo->handle)
(gdb) bt
0 radeon_drm_cs_add_buffer (bo=0x0) at radeon_drm_cs.c
1 0x00007fffe73575de in radeon_cs_create_fence radeon_drm_cs.c
2 0x00007fffe7358c48 in radeon_drm_cs_flush radeon_drm_cs.c
Signed-off-by: Julien Isorce <jisorce at oblong.com>
Signed-off-by: Marek Olšák <marek.olsak at amd.com>
(cherry picked from commit d09edb01468ca385b6a8ffe29ac434dc42a78d07)
Nominated-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0a73ddda801c6cde0183735625dea95842f9c27
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Apr 12 12:05:25 2017 +0100
Revert "freedreno: fix memory leak"
This reverts commit c57a03585052e3bd7d61d1307cae9a922e663c20.
As requested by Rob Clark
"This seems to be causing a performance regression (reported by
Nicolas).. and the leak it fixes is quite hypothetical. (Ie. hit by
apps that destroy/create context many times.)
On master, I think this can be solved by switching on 'reorder' by
default but that is probably too much of a behaviour change for
stable."
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3ae08bd44533aac51134dee4c8ed94a0a86a966
Author: Jerome Duval <jerome.duval at gmail.com>
Date: Wed Feb 22 16:02:51 2017 +0000
haiku/winsys: fix dt prototype args
Add the missing front_private, introduced with earlier commit.
(cherry picked from commit 62e27170a7f7a90091b4121002b7ce209ac7ccb0)
Fixes: 2b676570960 ("gallium/swrast: fix front buffer blitting. (v2)")
Nominated-by: Emil Velikov <emil.velikov at collabora.com>
[Emil Velikov: add commit message, fixes tag]
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1c39334dac70cbb5bce2a274e538cd2977023a7
Author: Jerome Duval <jerome.duval at gmail.com>
Date: Wed Feb 22 16:01:24 2017 +0000
haiku: build fixes around debug defines
Move the os/os_misc.h include further up, since it's the one that
implicitly provides the PIPE_OS_HAIKU define.
(cherry picked from commit 40b0c8666c337fd0fdff42ce70703cd300abcf0c)
Fixes: 373f118c6c7 ("gallium: do not wrap header inclusion in")
Nominated-by: Emil Velikov <emil.velikov at collabora.com>
[Emil Velikov: add commit message, fixes tag]
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8e217d057a25584949f57093684fe9b4978dbf0
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Tue Apr 11 08:33:20 2017 -0700
i965: Set kernel features before computing max GL version.
We check these bitfields when computing the Haswell max GL version.
We need to set them ahead of time, or they won't exist, and all our
checks will fail. That sets the max core profile GL version to 4.2.
This introduces the bizarre situation where asking for a GL context
with version 4.3+ fails, but asking for a GL core profile context
with version <= 4.2 actually promotes you a 4.5 context.
GLX_MESA_query_renderer also reported the bogus 4.2 value.
Now it shows 4.5.
Cc: "17.0" <mesa-stable at lists.freedesktop.org>
Reported-and-tested-by: Rafael Ristovski <rafael.ristovski at gmail.com>
(cherry picked from commit 02ccd8f52cffcc25e5fefdd0f900cf04230395f4)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Conflicts:
src/mesa/drivers/dri/i965/intel_screen.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=05eb1c7f5935733ffc24e373e8ad9d94c14a737a
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Mar 2 18:27:32 2017 -0800
i965: Skip register write detection when possible.
Detecting register write support by trial and error introduces a
stall at screen creation time, which it would be nice to avoid.
Certain command parser versions guarantee this will work (see the
giant comment in intelInitScreen2 below, or a few commits ago):
- Ivybridge: version >= 1 (kernel v3.16)
- Baytrail: version >= 2 (kernel v3.19)
- Haswell: version >= 7 (kernel v4.8)
For simplicity, we don't bother with version 1 in this patch.
This assumes that the user hasn't disabled aliasing PPGTT via a kernel
command line parameter. Don't do that - you're only breaking things.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
(cherry picked from commit 5e29af5f772c1e1b02a4cc46d2f7d3b5d2151ad8)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7f872f7b8a897e188cf7b0462867c8f0b5d9397
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Mar 2 18:21:31 2017 -0800
i965: Set screen->cmd_parser_version to 0 if we can't write registers.
If we can't write registers, then the effective command parser version
is 0 - it may exist, but it's not usefully enabling anything.
See kernel commit 1ca3712ca3429a617ed6c5f87718e4f6fe4ae0c6 (in v4.8)
where the kernel starts doing this for us. This makes us do more or
less the same thing on older kernels.
This should preserve a bit of sanity by allowing us to perform a
screen->cmd_parser_version > N check to determine that we really can
use the features promised by command parser version N.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
(cherry picked from commit 31693a13f8fbc52d4f19f1e8800a4edabeecbe19)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Conflicts:
src/mesa/drivers/dri/i965/intel_screen.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20319f5e88837bdd4561724dbf0bfdf6da4060f1
Author: Kenneth Graunke <kenneth at whitecape.org>
Date: Thu Mar 2 18:12:28 2017 -0800
i965: Document the sad story of the kernel command parser.
This should help us figure out the complexities of which kernel
versions we need to get various features on various platforms.
Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
(cherry picked from commit 4a2ad6b145b4dd0d19a8e5e0ee6bed09e08ce0eb)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0a48b641dd15607bed7b0c735a280067dca0e93
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Apr 8 18:31:35 2017 -0400
nouveau: when mapping a persistent buffer, synchronize on former xfers
If the buffer is being used, we should wait for those uses to be
complete before returning the map.
Fixes: GL45-CTS.direct_state_access.buffers_functional
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit d9cc58d6ec56e676b1285508a4118a83f5325833)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b6168c3b83d750cb0db2d6a4ae6ee52e2e520292
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Sat Apr 8 14:56:16 2017 -0400
nvc0: increase texture buffer object alignment to 256 for pre-GM107
We currently don't pass the low byte of the address via the surface
info, so in order to work with images, these have to implicitly be
aligned to 256. The proprietary driver also doesn't go out of its way to
provide lower alignment.
Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
(cherry picked from commit 8036809799c453b02f4c8fedbb5faaeb19af90c2)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=12d7da771729e9d93000129762996bac0c442976
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Apr 7 23:23:25 2017 -0400
nvc0/ir: fix overwriting of offset register with interpolateAtOffset
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 57a744025a2f705d29f60b0eac6e50f8a1ea6203)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4900fa3f82fa98aa30ca06de5eefa0e84e889b12
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date: Fri Apr 7 20:17:47 2017 -0400
nvc0/ir: fix LSB/BFE/BFI implementations
Overwriting the src register is a very bad idea - it logically maps onto
the TGSI registers, and so is effectively overwriting the source values.
Reported-by: Boyan Ding <boyan.j.ding at gmail.com>
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
(cherry picked from commit 60f5766db48fe81f55f4b7be47c2be27bdbe2c10)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=29a7d73c9ceccc56c3b913b0655849702bd0f7fd
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Apr 5 13:41:56 2017 -0700
i965/blorp: Bump the batch space estimate
Commit f938354362655a378d474c5f79c52cea9852ab91 recently increased the
alignment on vertex buffer data from 32 to 64. This caused us to
consume a bit more batch than we were before and we now go over the
estimate by a small amount on certain blits on gen8+. This commit bumps
then gen8 batch estimate by a bit to compensate. Haswell and older
still seems to be well within the limit.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100582
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
Acked-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: "13.0 17.0" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit c9c39812b91c8104bc0bea16053312547846249c)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ddd83c5f2a9cb25f165360270e94c6cab969ffd4
Author: Alex Deucher <alexander.deucher at amd.com>
Date: Wed Apr 5 09:40:53 2017 -0400
radeonsi: add new polaris10 pci id
Reviewed-by: Christian König <christian.koenig at amd.com>
Cc: 13.0 17.0 <mesa-stable at lists.freedesktop.org>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
(cherry picked from commit d921af62f5761b331039eee1497861b5826ecf82)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=04df217ac07847e7f020a180ac2951ed17209645
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Mar 31 15:23:35 2017 -0700
i965/blorp: Align vertex buffers to 64B
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: "13.0 17.0" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit f938354362655a378d474c5f79c52cea9852ab91)
[Emil Velikov: brw_state_batch has different signature]
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Conflicts:
src/mesa/drivers/dri/i965/genX_blorp_exec.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=33a9bedc24be183e8e181134c18aaa6d5713b065
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Mar 31 15:21:04 2017 -0700
anv/blorp: Align vertex buffers to 64B
This fixes issues seen when adding support for full 48-bit addresses.
The 48-bit addresses themselves have nothing to do with it other than
that it caused the kernel to place buffers slightly differently so they
interacted differently with the caches.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: "13.0 17.0" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 5d1ba2cb04f58b0c887304f0b8adda0b5623a710)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f509c8360967ee8804eb2845a08775a33cbb90c9
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Apr 3 12:25:15 2017 -0700
anv/pipeline: Properly handle unset gl_Layer and gl_ViewportIndex
When the shader does not set one of these values, they are supposed to
get a default value of 0. We have hardware bits in 3DSTATE_CLIP for
this but haven't been setting them. This fixes the intermittent failure
of dEQP-VK.geometry.layered.3d.render_to_default_layer.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: "13.0 17.0" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit c6f69eea6ac549fc2ffa46944de4dd82c9b53329)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f77cecf08cf9fba5e8f62e8ac1731c1916a97618
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Wed Mar 29 15:16:15 2017 -0700
i965/fs: Always provide a default LOD of 0 for TXS and TXL
We already provide a default LOD for textureQueryLevels and texture() on
non-fragment stages. However, there are more cases where one is needed
such as textureSize(gsampler2DMS*) in SPIR-V. Instead of trying to list
out all of the cases one at a time, just provide the default for all TXS
and TXL operations. This fixes a shader validation error in the new
Sascha deferredmultisampling demo which uses textureSize(gsampler2DMS).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100391
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>
Cc: "13.0 17.0" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 3503b2714b98684a2ceba5f4fd9a5bfbfbcaad38)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d20d8fdc1d4241d364627e2298d1ed0bc8d72013
Author: Marek Olšák <marek.olsak at amd.com>
Date: Fri Mar 24 00:55:55 2017 +0100
targets: export radeon winsys_create functions to silence LLVM warning
It silences the following radeonsi LLVM warning due to a previous
commit adding an LLVM workaround:
"mesa: for the -simplifycfg-sink-common option: may only occur zero or one
times!"
Cc: 17.0 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig at amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
Reviewed-by; Emil Velikov <emil.velikov at collabora.com>
(cherry picked from commit 18b12bf53351e1a902dc1f2e527a94ec8d8f3eff)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0e343f995c1af592eacd2709aa9a4d585a35e68
Author: Michal Srb <msrb at suse.com>
Date: Tue Mar 28 23:39:28 2017 +0300
st: Add cubeMapFace parameter to st_finalize_texture.
st_finalize_texture always accesses image at face 0, but it may not be
set if we are working with cubemap that had other face set.
This fixes crash in piglit
same-attachment-glFramebufferTexture2D-GL_DEPTH_STENCIL_ATTACHMENT.
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
(cherry picked from commit 52f9ccefcb75a9d42307890d7714b1cd92e864cb)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=79d97bcf668172078c88cece3509ac7007e23248
Author: Thomas Hellstrom <thellstrom at vmware.com>
Date: Tue Mar 28 21:32:22 2017 +0200
gbm/dri: Flush after unmap
Drivers may queue dma operations on the context at unmap time so we need
to flush to make sure the data gets to the bo. Ideally the application
would take care of this, but since there appears to be no exported gbm
flush functionality we need to explicitly flush at unmap time.
This fixes a problem where kmscube on vmwgfx in rgba textured mode would
render using an uninitialized texture rather than the intended
rgba pattern.
Signed-off-by: Thomas Hellstrom <thellstrom at vmware.com>
Reviewed-by: Eric Anholt <eric at anholt.net>
(cherry picked from commit ba8df2286a50117011925e915cd832b4a79f126e)
Squashed with commit
gbm/dri: Check dri extension version before flush after unmap
The commit mentioned below required the __DRI2FlushExtension to have
version 4 or above, for GBM functionality. That broke GBM with some
classic dri drivers. Relax that requirement so that we only flush
after unmap if we have version 4 or above. Drivers that require the flush
for correct functionality should implement the desired version.
Fixes: ba8df228 ("gbm/dri: Flush after unmap")
Cc: <mesa-stable at lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom at vmware.com>
Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
Tested-by: Dylan Baker <dylan at pnwbakers.com>
(cherry picked from commit 18e2aa063ca8e2aeb22a72253891e6f8f5d0d96b)
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5094311078e23a3a9f62b143f2451d3b91691134
Author: Craig Stout <cstout at google.com>
Date: Wed Mar 29 12:14:30 2017 -0700
anv/cmd_buffer: fix host memory leak
push_constants must be free'd.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100452
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Cc: "17.0 13.0" <mesa-stable at lists.freedesktop.org>
(cherry picked from commit 1da7a11de8113932871487efaeb2674a3d1c644a)
[Emil Velikov: resolve trivial conflicts]
Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
Conflicts:
src/intel/vulkan/anv_cmd_buffer.c
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5afb7e1ee03e1cdba48bbaedeac718d2ef72e69
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date: Wed Apr 12 10:30:37 2017 +0100
Revert "cherry-ignore: add the Flush after unmap in gbm/dri fix"
This reverts commit 3a84f6fd4330a00a8d89c24d569dbb450832602d.
The fix in question has been properly addressed and does not cause
regressions.
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