Mesa (master): radeonsi: don't allow user indices with indirect draws
Marek Olšák
mareko at kemper.freedesktop.org
Sun Apr 16 23:30:59 UTC 2017
Module: Mesa
Branch: master
Commit: 5438e39fae4faaae522cdec3edfd34c0478464e4
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5438e39fae4faaae522cdec3edfd34c0478464e4
Author: Marek Olšák <marek.olsak at amd.com>
Date: Sun Apr 2 16:22:54 2017 +0200
radeonsi: don't allow user indices with indirect draws
Not possible with GL and it will make future gallium rework easier.
(also it's something I wouldn't like to support)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
src/gallium/drivers/radeonsi/si_state_draw.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 0ada60afac..9b7b52c359 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1220,13 +1220,13 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
ib_tmp.index_size = 2;
ib = &ib_tmp;
} else if (ib->user_buffer && !ib->buffer) {
- unsigned start, count, start_offset;
+ unsigned start_offset;
- si_get_draw_start_count(sctx, info, &start, &count);
- start_offset = start * ib->index_size;
+ assert(!info->indirect);
+ start_offset = info->start * ib->index_size;
u_upload_data(ctx->stream_uploader, start_offset,
- count * ib->index_size,
+ info->count * ib->index_size,
sctx->screen->b.info.tcc_cache_line_size,
(char*)ib->user_buffer + start_offset,
&ib_tmp.offset, &ib_tmp.buffer);
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