Mesa (master): i965/blit: Remember to include miptree buffer offset in relocs

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: fb63c43fd1b7adb5cb4f34e7616e7d564ca178e5
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb63c43fd1b7adb5cb4f34e7616e7d564ca178e5

Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jul 31 10:56:15 2017 +0100

i965/blit: Remember to include miptree buffer offset in relocs

Remember to add the offset to the start of the buffer in the relocation
or else we write 0xff into random bytes elsewhere.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Cc: mesa-stable at lists.freedesktop.org

---

 src/mesa/drivers/dri/i965/intel_blit.c         | 4 ++--
 src/mesa/drivers/dri/i965/intel_pixel_bitmap.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index b1db7aa229..a9cdf489f1 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -830,11 +830,11 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw,
          if (brw->gen >= 8) {
             OUT_RELOC64(mt->bo,
                         I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                        offset);
+                        mt->offset + offset);
          } else {
             OUT_RELOC(mt->bo,
                       I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                      offset);
+                      mt->offset + offset);
          }
          OUT_BATCH(0xffffffff); /* white, but only alpha gets written */
          ADVANCE_BATCH_TILED(dst_y_tiled, false);
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
index aeea3c8bd6..8d467adc56 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
@@ -294,7 +294,7 @@ do_blit_bitmap( struct gl_context *ctx,
 						color,
 						irb->mt->surf.row_pitch,
 						irb->mt->bo,
-						0,
+						irb->mt->offset,
 						irb->mt->surf.tiling,
 						dstx + px,
 						dsty + py,