Mesa (17.1): 64 new commits

Emil Velikov evelikov at kemper.freedesktop.org
Mon Aug 7 12:08:21 UTC 2017


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d48433078cb9501c506d2a15834e8dda1a3caef
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Aug 7 13:02:41 2017 +0100

    docs: add release notes for 17.1.6
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b15f1cb4dfc1d9beb6e89878212f6d33779d5246
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Aug 7 12:59:23 2017 +0100

    Update version to 17.1.6
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ba75506cca9f1faea1d3d523f9421f81c58b815
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Mon Jul 31 16:59:06 2017 -0500

    swr/rast: fix scons gen_knobs.h dependency
    
    Copy/paste error was duplicating a gen_knobs.cpp rule.
    
    Fixes: 5079c277b57 ("swr: [scons] Fix windows build")
    Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>
    (cherry picked from commit e4a6ae06cf01a21d7fe32e3ff2fc441102d68f82)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b84abbfff712fbd024652a9c4425735661d3a121
Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Sun Jul 30 23:26:11 2017 +0200

    radv: Don't underflow non-visible VRAM size.
    
    In some APU situations the reported visible size can be larger than
    VRAM size. This properly clamps the value.
    
    Surprisingly both CTS and spec seem to allow a heap type with size 0,
    so this seemed like the easiest option to me.
    
    Signed-off-by: Bas Nieuwenhuizen <basni at google.com>
    Fixes: 4ae84efbc5c "radv: Use enum for memory heaps."
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>
    Tested-by: Michel Dänzer <michel.daenzer at amd.com>
    (cherry picked from commit 8229706ad86b27ed571f17872006a488fcd35378)
    [Emil Velikov: branch uses radeon_info::visible_vram_size]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/amd/vulkan/radv_device.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d27d9cb26a6f9e576274b82dd1600cfe0b0c9fe
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Jul 12 11:36:29 2017 -0700

    spirv: Fix SpvImageFormatR16ui
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Cc: "17.1 17.2" <mesa-stable at lists.freedesktop.org>
    (cherry picked from commit 95c6a97464e7baaca6e09f829da0be5ac8c50297)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb880dfba7f07b8a0cb961c56cbad5bbf95ad6b1
Author: Thomas Hellstrom <thellstrom at vmware.com>
Date:   Thu Jun 22 09:24:34 2017 +0200

    dri3: Wait for all pending swapbuffers to be scheduled before touching the front
    
    This implements a wait for glXWaitGL, glXCopySubBuffer, dri flush_front and
    creation of fake front until all pending SwapBuffers have been committed to
    hardware. Among other things this fixes piglit glx-copy-sub-buffers on dri3.
    
    Signed-off-by: Thomas Hellstrom <thellstrom at vmware.com>
    Reviewed-by: Brian Paul <brianp at vmware.com>
    Reviewed-by: Sinclair Yeh <syeh at vmware.com>
    Reviewed-by: Eric Anholt <eric at anholt.net>
    Cc: <mesa-stable at lists.freedesktop.org>
    (cherry picked from commit 185ef06fd2db782d9d3d6046580f7cece02c4797)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e4f8479a8e3eee3b036576ef11dcece969d3c20
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Thu Jul 27 14:06:59 2017 +0200

    gallium/radeon: fix ARB_query_buffer_object conversion to boolean
    
    The issue here is that the immediate is treated as a 64-bit value,
    and fetching it does not work reliably with swizzles that are different
    from xy and zw.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit da83687c4ba7e9022f6f14176393a9e3c6391ed5)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4cb6acb62367de3291e75b706a8f57538037fbf2
Author: Emil Velikov <emil.l.velikov at gmail.com>
Date:   Thu Aug 3 00:13:19 2017 +0100

    fixup! cherry-ignore: add a bunch more commits to the list

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ac59aa824dd30b928ba96bbbe360593af4a1b83
Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Mon Jul 31 18:26:49 2017 -0700

    nir: fix algebraic optimizations
    
    The optimizations are only valid for 32-bit integers. They were
    mistakenly firing for 64-bit integers as well.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    (cherry picked from commit de914615753678c5514733a37ac7d0360a43e525)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=58e9060fb0c30bc915f9dced5f9160500e797a13
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:55:54 2017 +0100

    cherry-ignore: add a bunch more commits to the list
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=18a1b73ce2ef2dc24a9110c76488f5e09420363b
Author: Lucas Stach <l.stach at pengutronix.de>
Date:   Fri Jun 9 18:20:56 2017 +0200

    etnaviv: fix memory leak when BO allocation fails
    
    The resource struct is already allocated at this point and should be
    freed properly.
    
    Signed-off-by: Lucas Stach <l.stach at pengutronix.de>
    Reviewed-by: Philipp Zabel <p.zabel at pengutronix.de>
    Reviewed-by: Christian Gmeiner <christian.gmeiner at gmail.com>
    Reviewed-by: Wladimir J. van der Laan <laanwj at gmail.com>
    (cherry picked from commit 4fb9f97047eb1e43c47cb7cacba27ccd20383eff)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b0beffb6244d14f642e323f446d4ea194d05c59
Author: Daniel Stone <daniels at collabora.com>
Date:   Mon Jul 24 14:42:56 2017 +0100

    st/dri: Check get-handle return value in queryImage
    
    In the DRIImage queryImage hook, check if resource_get_handle() failed
    and return FALSE if so.
    
    Signed-off-by: Daniel Stone <daniels at collabora.com>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit b4a18f13ce7f0e7d0307fb3388819345616752ce)
    [Emil Velikov: drop offset and modifier hunks - not in branch]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/gallium/state_trackers/dri/dri2.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfaf401d6bc340e28c39d693eb1b1f3ff6bbc1c4
Author: Dave Airlie <airlied at redhat.com>
Date:   Thu Jul 27 04:51:48 2017 +0100

    radv: for stencil only set Z tile mode index to same value
    
    On SI this was causing a hang in
    dEQP-VK.pipeline.render_to_image.core.2d_array.mipmap.r16g16_sint_s8_uint
    
    This was due to not handling the tile mode index for depth like
    I fixed previously for new GPUs.
    
    Fixes: 01d0c5a9 (radv: fix stencil regression since new addrlib import)
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit 800d1622096ca52b955bdfc20eb770b80ef15221)
    [Emil Velikov: XXX]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/amd/vulkan/radv_device.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3668a143a43b6bf14617cc21a2b0220d823b446b
Author: Dave Airlie <airlied at redhat.com>
Date:   Wed Jul 26 02:34:54 2017 +0100

    radv/ac: port SI TC L1 write corruption fix.
    
    This ports 72e46c988 to radv.
        radeonsi: apply a TC L1 write corruption workaround for SI
    
    Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit e77ff11ffe1a52b8e17a847f263746c849db3f11)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=06d163509d28700c4e1b0b631761c731f13fb86a
Author: Dave Airlie <airlied at redhat.com>
Date:   Wed Jul 26 02:32:39 2017 +0100

    radv/ac: realign SI workaround with radeonsi.
    
    This ports: da7453666ae
    radeonsi: don't apply the Z export bug workaround to Hainan
    to radv.
    
    Just noticed in passing.
    
    Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit a81e99f50a718790de379087c9f5a636e32b2a28)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=72944933351438ba54ee617e0f6ba8e9fde7549d
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Jul 24 11:42:54 2017 +0100

    radv: fix buffer views on SI/CIK.
    
    Fixes CTS dEQP-VK.memory.pipeline_barrier.host_write_uniform_texel_buffer.1024
    on SI/CIK with radv.
    
    Fixes: f4e499ec (radv: add initial non-conformant radv vulkan driver)
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit ca82ef5ac75e50abb109986b55002cca24f7c0fb)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b6096d560c5b51878c329e9ac8fc742ee6fcf2c
Author: Dave Airlie <airlied at redhat.com>
Date:   Mon Jul 24 17:09:47 2017 +1000

    radv: fix non-0 based layer clears.
    
    If the layer base was > 0, it wasn't getting passed as the start
    instance or getting added in the shaders.
    
    Fixes CTS dEQP-VK.api.image_clearing.core.clear_color_attachment.2d_r8_uint_multiple_layers
    
    Fixes: 7e0382fb (radv: add support for layered clears (v2))
    Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit 75392e76adf143070a5f208febd8da31b39b7676)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=270e7476c89329925384942e35e8576333d45271
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Jul 17 15:34:14 2017 +0100

    swr: remove unneeded fallback strcasecmp define
    
    The last user of the function was removed with earlier commit.
    
    Fixes: 50842e8a931 ("swr: replace gallium->swr format enum conversion")
    Cc: Tim Rowley <timothy.o.rowley at intel.com>
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Tim Rowley <timothy.o.rowley at intel.com>
    (cherry picked from commit a0755f2e6a1b41b2c5e295fa5ff8eb8dfbf5eb41)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7066ec442e2db15242acd7ef194a7f0c065268b
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Thu Jul 13 17:43:10 2017 +0100

    i965: use strtol to convert the integer deviceID override
    
    One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE
    variable. A few symbolic names or a numerical value for the actual
    device ID is accepted.
    
    At the same time we're using strtod (string to double) to convert the
    string to a decimal numeral. A seeming thinko, made by the original
    commit that introduces the code in libdrm_intel and got here with the
    import.
    
    Fixes: 514db96c117a ("i965: Import libdrm_intel.")
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit 647b5a18df6e423e1a15d92bc767ba0cf04493a3)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1b55deeacd5e5f0f565bfa8a622c7a6a225edb36
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date:   Fri Jul 14 10:31:38 2017 +0000

    anv/pipeline: do not use BITFIELD64_BIT()
    
    In the previous commit, forgot to apply v2 suggestions.
    
    Fixes: 28d0c38 (anv/pipeline: use unsigned long long constant to check
    enable vertex inputs)
    
    Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
    (cherry picked from commit 5cd4ece34ebdc1383f1e2376c88097d06544e2f6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ae901ee870867cefa255e18f07684e18a9a7236
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Jul 4 16:53:40 2017 +0100

    travis: lower SWR requirement to GCC 4.8, aka std=c++11
    
    With ealier commit we relaxed the requirement from C++14 to C++11.
    Update the build script so that it
    
    Cc: Tim Rowley <timothy.o.rowley at intel.com
    Fixes: 0b80b025021 ("swr: relax c++ requirement from c++14 to c++11")
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    (cherry picked from commit 459274144dbd9227a57858316b996cede9094bca)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=84e6e92236b113d0ef465c9ed09eb39f9fb8ee62
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date:   Mon Jun 12 15:17:20 2017 +0100

    i965: Resolve framebuffers before signaling the fence
    
    From KHR_fence_sync:
    
      When the condition of the sync object is satisfied by the fence
      command, the sync is signaled by the associated client API context,
      causing any eglClientWaitSyncKHR commands (see below) blocking on
      <sync> to unblock. The only condition currently supported is
      EGL_SYNC_PRIOR_COMMANDS_COMPLETE_KHR, which is satisfied by
      completion of the fence command corresponding to the sync object,
      and all preceding commands in the associated client API context's
      command stream. The sync object will not be signaled until all
      effects from these commands on the client API's internal and
      framebuffer state are fully realized. No other state is affected by
      execution of the fence command.
    
    If clients are passing the fence fd (from EGL_ANDROID_native_fence_sync)
    to a compositor, that fence must only be signaled once the framebuffer
    is resolved and not before as is currently the case.
    
    v2: fixup assert to use GL_SYNC_GPU_COMMANDS_COMPLETE (Chad)
    
    Reported-by: Sergi Granell <xerpi.g.12 at gmail.com>
    Fixes: c636284ee8ee ("i965/sync: Implement DRI2_Fence extension")
    Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
    Cc: Sergi Granell <xerpi.g.12 at gmail.com>
    Cc: Rob Clark <robdclark at gmail.com>
    Cc: Chad Versace <chadversary at chromium.org>
    Cc: Daniel Stone <daniels at collabora.com>
    Cc: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Chad Versace <chadversary at chromium.org>
    (cherry picked from commit 618be8cc1ad1760103930b69ffbf528d7b861ab3)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=231e8ab401fe1dcc06d2623b9212fe17e7142e55
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Wed Aug 2 23:27:13 2017 +0100

    bin/cherry-ignore: add radeonsi "fix of a fix"
    
    The commit addresses an earlier fix, which did not land in branch.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6731bdf5d16b143647f37446e9e45cc34dab98e
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:28:02 2017 +0100

    cherry-ignore: add yet another bindless textures fix
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5b22824adb0732a7d2fed69c72d3201884ce4ca6
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:25:24 2017 +0100

    cherry-ignore: add "st/glsl_to_tgsi: fix getting the image type for array of structs"
    
    Addresses commit which did not land in branch.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=42eeba915366c412ee1557fbca3850615334eb30
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:20:08 2017 +0100

    cherry-ignore: add bindless textures fix
    
    The bindless work did not land in branch.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=135feefc5c79b560d68258807d9c55408b4f07b2
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:14:27 2017 +0100

    cherry-ignore: ignore reverted st/mesa commit
    
    Applied to master and reverted shortly afterwords.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d5975a0e4267aa14145a4081bf7f4572a875d20
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:12:30 2017 +0100

    cherry-ignore: add a couple of radeonsi/gfx9 commits
    
    They depend on the merged shaders (re)work which landed past the 17.1
    branchpoint.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=90d4e71badbab84aae0b8484dece2557f73087a6
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:04:38 2017 +0100

    cherry-ignore: add "swr: fix transform feedback logic"
    
    Explicit 17.2 nomination, since it depends on refactoring past the 17.1
    branchpoint.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=14fe6b1da29686ff043440b0d3ee215173fb031b
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Tue Aug 1 00:00:55 2017 +0100

    cherry-ignore: add "swr/rast: non-regex knob fallback code for gcc < 4.9"
    
    Addresses commit merged past the 17.1 brancpoint.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0f26ad05e26db63dcbf600b0658ccece8e4268e
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Jul 31 23:56:23 2017 +0100

    cherry-ignore: add a couple of radeon commits
    
    Both are explicit 17.2 nominations, since they depend on work which
    landed past the 17.1 branchpoint.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0e3c153a98112109485df08c612b980ff588542
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Jul 25 17:29:58 2017 +0200

    gallium/radeon: make S_FIXED function signed and move it to shared code
    
    This fixes a bug uncovered by:
        2412c4c81ea0488df865817a0de91ec46e359b72
        util: Make CLAMP turn NaN into MIN.
    
    Cc: 17.2 <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
    (cherry picked from commit 433f6f7ac9ed6624fec02cc055c3bfa247dba185)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a50cb9a09498594313c7ba1389db608085e7f0c2
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Jul 25 14:32:03 2017 +0200

    radeonsi/gfx9: reduce max threads per block to 1024 on gfx9+
    
    The number of supported waves per thread group has been reduced to 16
    with gfx9. Trying to use 32 waves causes hangs, and barriers might
    not work correctly with > 16 waves.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit a0e6b9a2db5aa5f06a4f60d270aca8344e7d8b3f)
    [Emil Velikov: add a HAVE_LLVM check, as applicable in branch]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/gallium/drivers/radeon/r600_pipe_common.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=28ae1aac86d2e70ecd94729a67f173277d0512ff
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Jul 25 16:47:27 2017 +0200

    radeonsi: fix detection of DRAW_INDIRECT_MULTI on SI
    
    The firmware version numbers for SI were wrong. The new numbers are probably
    too conservative (we don't have a definitive answer by the firmware team),
    but DRAW_INDIRECT_MULTI has been confirmed to work with these versions on
    Tahiti (by Gustaw) and on Verde (by myself).
    
    While this is technically adding a feature, it's a feature we thought we had
    for a long time. The change is small enough and we're early enough in the 17.2
    release cycle that it should still go in.
    
    Reported-by: Gustaw Smolarczyk <wielkiegie at gmail.com>
    Cc: 17.2 <mesa-stable at lists.freedesktop.org>
    Acked-by: Alex Deucher <alexander.deucher at amd.com>
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit 65fbaab0b74b6b5a2ac483d48beeefa0a29ff15e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce731e11465ededae4eb1e61391a3c6c3f1abfbf
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Fri Jul 21 08:32:24 2017 +0200

    anv: only expose up to 28 vertex attributes
    
    The EU limit of 128 GRFs should allow 32 vertex elements of 4 GRFs.
    However, the maximum allowed value of "Vertex URB Entry Read Length"
    in SIMD8 is 15. And 15 * 8 = 120 gives us a limit of 30 vertex elements.
    Because we also need to reserve a vertex buffer to upload
    VertexIndex/InstanceIndex and another to upload DrawID when needed,
    we can only expose 28.
    
    Cc: "17.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    (cherry picked from commit 31f1863ace73d31a579e5c36252a957818ad09cf)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4bfe327622eec10f5edcc4a3cdcbcd3e869f9910
Author: Iago Toral Quiroga <itoral at igalia.com>
Date:   Wed Jul 19 12:49:33 2017 +0200

    anv/cmd_buffer: fix off by one error in assertion
    
    Cc: "17.2" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    (cherry picked from commit a848e693efc8e2a1d355dc1076409968b374153f)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8628d73caf40bb38afd3998a037cad1dbc9e4664
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Jul 31 23:43:24 2017 +0100

    cherry-ignore: add "i965: Fix = vs == in MCS aux usage assert."
    
    Addesses 0f9b609cf4f, which landed shortly before the 17.2 branchpoint.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c3cc395f7b3c51f534ebb0d5637c0dc22c9efa14
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Jul 31 23:42:03 2017 +0100

    cherry-ignore: add "i965: Fix offset addition in get_isl_surf"
    
    Addesses 63a43f41619, which landed shortly before the 17.2 branchpoint.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f28a9b2bf9d9de226d6e51c71b260e1bc0e62fc9
Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Tue Jul 25 17:49:22 2017 +0100

    i965: perf: flush batchbuffers at the beginning of queries
    
    As Chris commented, it makes more sense to have batch buffer flushes
    before the query. Usually applications like frame_retrace do a series
    of queries and in that case, with flushes at the end of the queries,
    we might still have the first query contained in 2 different batchs.
    More generally it would be quite usual to have the query contained in
    2 batch buffers because we never now what's the fill rate of the
    current batch buffer.
    
    If we move the flushing at the beginning of the queries, it's pretty
    much guaranteed that queries will be contained in a single batch
    buffer (unless the amount of commands is huge, but then it's only fair
    to include reloading request times in the measurements).
    
    Fixes: adafe4b733c02 ("i965: perf: minimize the chances to spread queries across batchbuffers")
    Reported-by: Chris Wilson <chris at chris-wilson.co.uk>
    Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Cc: "17.2 17.1" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    (cherry picked from commit 9f439ae1201cb049ffedb9b0e2d4f393fb0a761e)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a9c5afe136b6c64eda063a7360cb264983d83ec
Author: Eric Anholt <eric at anholt.net>
Date:   Mon Jul 24 12:34:23 2017 -0700

    broadcom/vc4: Prefer blit via rendering to the software fallback.
    
    I don't know how I managed to leave this here for so long.  Found when
    working on a 1:1 overlapping blit extension for X11.
    
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 93fec49a75ce799bb6fe167f9409fd553a5781c6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a6822864b804c13e1f89724eaa1f81283b1778a
Author: Wladimir J. van der Laan <laanwj at gmail.com>
Date:   Sun Jul 23 13:24:39 2017 +0200

    etnaviv: Clear lbl_usage array correctly
    
    Fill the entire array instead of just a quarter. This avoids
    crashes with large shaders.
    (currently this never causes a problem because shaders larger than 2048/4
    instructions are not supported by this driver on any hardware, but it will
    cause problems in the future)
    
    Fixes: ec436051899 ("etnaviv: fix shader miscompilation with more than 16 labels")
    Cc: mesa-stable at lists.freedesktop.org
    Signed-off-by: Wladimir J. van der Laan <laanwj at gmail.com>
    Reviewed-by: Christian Gmeiner <christian.gmeiner at gmail.com>
    (cherry picked from commit 15a1ceb127b70ac98b03cae051927f75fb7ee204)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e96b03037ca455446fd7b5797c4e594ef38dbeb5
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Fri Jul 21 16:44:14 2017 +0100

    swr: don't forget to link AVX/AVX2 against pthreads
    
    Seems like the backends have been using pthreads since day one, yet
    we've been missing the link.
    
    With later commit we'll fix a typo, hence the libraries will be build
    with -Wl,no-undefined, aka failing the build on unresolved symbols.
    
    v2: Split from a larger patch.
    
    Cc: mesa-stable at lists.freedesktop.org
    Cc: Bruce Cherniak <bruce.cherniak at intel.com>
    Cc: Tim Rowley <timothy.o.rowley at intel.com>
    Cc: Laurent Carlier <lordheavym at gmail.com>
    Fixes: c6e67f5a9373e916a8d2 "gallium/swr: add OpenSWR rasterizer"
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    (cherry picked from commit 33d397ada50a1d1f485205e847003dc48146ec19)
    [Emil Velikov: add PTHREAD_LIBS to COMMON_LIBADD]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/gallium/drivers/swr/Makefile.am

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1bc70bcc75d0558012eb21ca9970ce7a6efa4cff
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Jul 31 23:31:23 2017 +0100

    cherry-ignore: add "anv: Transition MCS buffers from the undefined layout"
    
    Depends on earlier refactoring commit 6235f08ff8870636d89d2181e0a9dfc3ebec7b45
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a488340bd1d7046aa022b4f12f26cc36ac0d7fb0
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Fri Jul 21 11:38:39 2017 -0500

    swr/rast: quit using linux-specific gettid()
    
    Linux-specific gettid() syscall shouldn't be used in portable code.
    Fix does assume a 1:1 thread:LWP architecture, but works for our
    current target platforms and can be revisited later if needed.
    
    Fixes unresolved symbol in linux scons builds.
    
    v2: add comment in code about the 1:1 assumption.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Bruce Cherniak <bruce.cherniak at intel.com>
    (cherry picked from commit d1e7153228304eb1be85580cbfdea1a57c5f203b)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=57bf8e1cd808e7333ca47289621b993bf199ddd6
Author: Tim Rowley <timothy.o.rowley at intel.com>
Date:   Wed Jul 19 14:18:49 2017 -0500

    gallium/util: fix nondeterministic avx512 detection
    
    cpuid.7 requires cx=0 to select the extended feature leaf.
    
    avx512 detection was using the non-indexed cpuid resulting
    in random non-detection of avx512.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Roland Scheidegger <sroland at vmware.com>
    (cherry picked from commit 131b9f644cbe70728ba02878483e22459400bcb4)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e0951c67f4401a206db5e94d77dc67dfccf88010
Author: Chad Versace <chadversary at chromium.org>
Date:   Mon Jul 17 15:18:51 2017 -0700

    anv/image: Fix VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
    
    We incorrectly detected VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT.  We looked
    for the bit in VkImageCreateInfo::usage, but it's actually in
    VkImageCreateInfo::flags.
    
    Found by assertion failures while enabling VK_ANDROID_native_buffer.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    (cherry picked from commit 5d6905211355464de4885492511e5f9d936cc058)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c8ffdad91846bb641a42559b4c1eb73714401fb
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Fri Jul 7 19:13:59 2017 +0100

    swrast: add dri2ConfigQueryExtension to the correct extension list
    
    The extension should be in the list as returned by getExtensions().
    Seems to have gone unnoticed since close to nobody wants to change the
    vblank mode for the software driver.
    
    v2: Rebase
    
    Cc: mesa-stable at lists.freedesktop.org
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Alex Deucher <alexander.deucher at amd.com> (v1)
    (cherry picked from commit 7791949dadd5af707055d0076874177e5e8e2133)
    [Emil Velikov: drop st/dri hunk, squash correct swrast piece]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=891d1f8fea7ef55745f7cc0009eec6023818ac31
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Jul 17 21:08:42 2017 -0700

    nir: Use nir_src_copy instead of direct assignments.
    
    If the source is an indirect register, there is ralloc'd data.  Copying
    with a direct assignment will copy the pointer, but the data will still
    belong to the old instruction's memory context.  Since we're lowering
    and throwing away instructions, that could free the data by mistake.
    
    Instead, use nir_src_copy, which properly handles this.
    
    This is admittedly not a common case, so I think the bug is real,
    but unlikely to be hit.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    (cherry picked from commit 0320bb2c6cb27370e2389b392b63f8d05c7cb4c7)
    [Emil Velikov: drop nir_lower_atomics_to_ssbo.c - not in branch]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/compiler/nir/nir_lower_atomics_to_ssbo.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca17d32544f636db0fabc46ea0cdfe29bbc003fc
Author: Timothy Arceri <tarceri at itsqueeze.com>
Date:   Fri Jun 30 12:03:18 2017 +1000

    nir: fix nir_opt_copy_prop_vars() for arrays of arrays
    
    Previously we only incremented the guide for a single
    dimension/wildcard.
    
    V2: rework logic to avoid code duplication
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 3f0fb23b039443d581d221b1fe9158f9cc81ccd6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=29e816b9f2e715a049b464da034b88d440e83641
Author: Jason Ekstrand <jason at jlekstrand.net>
Date:   Tue Jul 18 16:50:39 2017 -0700

    nir/vars_to_ssa: Handle missing struct members in foreach_deref_node
    
    This can happen if, for instance, you have an array of structs and there
    are both direct and wildcard references to the same struct and some
    members only have direct or only have indirect.
    
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit ecf91898e0a8e144adb82d72aecf1224e77ee31b)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e41999f94605610d5f978262fe691471b68ccde
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Jul 11 16:28:55 2017 -0700

    anv/image: Add INPUT_ATTACHMENT to the list of required usages
    
    From the Vulkan 1.0.53 spec VU for vkCreateImageView:
    
        "image must have been created with a usage value containing at least
        one of VK_IMAGE_USAGE_SAMPLED_BIT, VK_IMAGE_USAGE_STORAGE_BIT,
        VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
        VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT, or
        VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT"
    
    We were missing VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT from out list.
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit c5700ed72e765043bb1c8523a05ade235496e053)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bd9d289c0fba9600d72d4065fbbd13a90f1c18a
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Jul 11 08:13:13 2017 -0700

    anv: Stop leaking the no_aux sampler surface state
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit cbdfd1daa24ee9a7a612f7b0e9aa4610af05e211)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a0289d73d662364872ec21d0056bb30cc1b6163
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Jul 11 15:47:36 2017 -0700

    anv/cmd_buffer: Properly handle render passes with 0 attachments
    
    We were early returning and never created the NULL surface state.
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Tested-by: James Legg <jlegg at feralinteractive.com>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit bd41564746ca4f4bd46185b99754eaa012c359e5)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd241abbe0fd2b49aa380d16866e003a875c58d0
Author: Mark Thompson <sw at jkqxz.net>
Date:   Sat Jul 15 19:51:56 2017 +0100

    st/va: Fix scaling list ordering for H.265
    
    Mesa here requires the scaling lists in diagonal scan order, but
    VAAPI passes them in raster scan order.  Therefore, rearrange the
    elements when copying.
    
    v2: Move scan tables to vl_zscan.c.
        Fix type in size assertion.
    
    Cc: mesa-stable at lists.freedesktop.org
    Signed-off-by: Mark Thompson <sw at jkqxz.net>
    Reviewed-by: Christian König <christian.koenig at amd.com>
    (cherry picked from commit 63dcfed81f011dae5ca68af3369433be28135415)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=31b10d28834272314bfb943e8e38595320b4fb9d
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Fri Jul 14 16:18:59 2017 +0100

    radv: advertise v6 of the wayland surface extension
    
    Jason updated the Khronos spec to explicitly state that Wayland surfaces
    must support VK_PRESENT_MODE_MAILBOX_KHR.
    
    ANV did so since day one (back in 2015)
    
    Cc: mesa-stable at lists.freedesktop.org
    Cc: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
    Cc: Dave Airlie <airlied at redhat.com>
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    (cherry picked from commit 4168c162c5bcbbfc6c712466b9c3d7d0dbac06e5)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=53f0946e9e27ba7fab4e7969ba20a84baa3a0588
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Fri Jul 14 16:14:14 2017 +0100

    anv: advertise v6 of the wayland surface extension
    
    Jason updated the Khronos spec to explicitly state that Wayland surfaces
    must support VK_PRESENT_MODE_MAILBOX_KHR.
    
    ANV did so since day one (back in 2015)
    
    Cc: mesa-stable at lists.freedesktop.org
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    (cherry picked from commit 43c188f9708b3e80b9f1c9c4c6bb16ac94b5ce5e)
    [Emil Velikov: resolve trivial conflicts]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/intel/vulkan/anv_device.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bef62d6b7aa8305d6387d9b24b487f9cba5e067
Author: Eric Engestrom <eric.engestrom at imgtec.com>
Date:   Fri Jul 14 11:14:28 2017 +0100

    configure: only install khrplatform.h if needed
    
    khrplatform.h is only used by EGL and GLES; let's only install it when
    one of those is enabled.
    
    Cc: mesa-stable at lists.freedesktop.org
    Signed-off-by: Eric Engestrom <eric.engestrom at imgtec.com>
    Reviewed-by: Jussi Kukkonen <jussi.kukkonen at intel.com>
    Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
    (cherry picked from commit 8821ef4be1009328fc0bbf651feda6377efcd6b6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b21754073079f17056739a6fddaada03368170b
Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date:   Thu Jul 13 14:33:57 2017 +0000

    anv/pipeline: use unsigned long long constant to check enable vertex inputs
    
    When initializing the ANV pipeline, one of the tasks is checking which
    vertex inputs are enabled. This is done by checking if the enabled bits
    in inputs_read.
    
    But the mask to use is computed doing `(1 << (VERT_ATTRIB_GENERIC0 +
    desc->location))`. The problem here is that if location is 15 or
    greater, the sum is 32 or greater. But C is handling 1 as a 32-bit
    integer, which means the displaced bit is out of range and thus the full
    value is 0.
    
    Thus, use 1ull, which is an unsigned long long value.
    
    This fixes:
    dEQP-VK.pipeline.vertex_input.max_attributes.16_attributes.binding_one_to_one.interleaved
    
    v2: use 1ull instead of BITFIELD64_BIT() (Matt Turner)
    
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    Signed-off-by: Juan A. Suarez Romero <jasuarez at igalia.com>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 28d0c38d85d94cab23667049f03ea072b8e7907c)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=68ebae30dfc895bfe769d0555a01681e40c8bbaf
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Jul 12 15:38:57 2017 +0200

    radeonsi/gfx9: fix crash building monolithic merged ES-GS shader
    
    Forwarding from the ES prolog to the ES just barely exceeds the current
    maximum array size when 16 vertex attributes are used. Give it a decent
    bump to account for merged shaders having up to 32 user SGPRs.
    
    Fixes a crash in GL45-CTS.multi_bind.draw_bind_vertex_buffers.
    
    Cc: mesa-stable at lists.freedesktop.org
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit c22e3c5373ad0df160f13fe8271c32e8d7e61b43)
    [Emil Velikov: resolve trivial conflicts - drop initial[] hunk]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/gallium/drivers/radeonsi/si_shader.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fc41e3b74a0195118989289f7f1dff53079ce643
Author: Thomas Hellstrom <thellstrom at vmware.com>
Date:   Tue Jul 4 12:55:15 2017 +0900

    loader/dri3: Use dri3_find_back in loader_dri3_swap_buffers_msc
    
    If the application hasn't done any drawing since the last call, we
    would reuse the same back buffer which was used for the previous swap,
    which may not have completed yet. This could result in various issues
    such as tearing or application hangs.
    
    In the normal case, the behaviour is unchanged.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97957
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101683
    Cc: mesa-stable at lists.freedesktop.org
    
    [Michel Dänzer: Make Thomas' fix from bugzilla actually work as
     intended, write commit log]
    
    (cherry picked from commit 81fb1547772d42c527318837d4207ecdb6899e5d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a1cb12b0a3ab8881bf1b7c8a8375b6bac3f7c71e
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Jul 25 17:34:52 2017 +0200

    st/mesa: always unconditionally revalidate main framebuffer after SwapBuffers
    
    This fixes the black Feral launcher window.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101867
    
    Cc: 17.2 <mesa-stable at lists.freedesktop.org>
    Tested-by: Edmondo Tommasina <edmondo.tommasina at gmail.com>
    (cherry picked from commit 7257c171e9eadc05903140cffa26a253f0d0178a)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff04dfc28ad8613a0bb7151d1dac79c143ca273e
Author: Ilia Mirkin <imirkin at alum.mit.edu>
Date:   Mon Jul 10 20:58:31 2017 -0400

    nv50/ir: fix threads calculation for non-compute shaders
    
    We were using the "cp" union fields, which are only valid for compute
    shaders. The threads calculation affects the available GPRs, so just
    pick a small number for other shader types to avoid limiting available
    registers.
    
    Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 3645268748c44825ce8d37bf03f684731eb2652a)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5835f4f4c6f86673ffddf070ef754b428d1434c9
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Jul 31 23:10:23 2017 +0100

    cherry-ignore: add "anv: Round u_vector element sizes to a power of two"
    
    The commit addresses issue brought up with 08413a81b93dc537fb0c3.
    With the latter missing in branch.
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f99597591ac5b87f106d6f324f4ce6bfc7554bc
Author: Brian Paul <brianp at vmware.com>
Date:   Tue Jul 11 14:56:00 2017 -0600

    svga: fix texture swizzle writemasking
    
    Commit bfe1e7737a76e3b046 changed how texture swizzles are set up.
    This exposed a latent bug in the VMware driver: we were ignoring
    the texture instruction's writemask when applying the 0 and 1
    swizzle terms.
    
    This wasn't caught by the Piglit texture swizzle test because it
    only exercises fixed function (no write masking).
    
    Fixes issues seen with ETQW apitrace.
    
    CC: <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Charmaine Lee <charmainel at vmware.com>
    (cherry picked from commit f7e78abdf45b26f3991dc336120162ae01b208f1)




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