Mesa (master): radeonsi: declare new user SGPR indices for bindless samplers/images

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 781a13c475f019824b6ed255e6a6a9deebac774a
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=781a13c475f019824b6ed255e6a6a9deebac774a

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Jun 28 18:11:48 2017 +0200

radeonsi: declare new user SGPR indices for bindless samplers/images

A new pair of user SGPR is needed for loading the bindless
descriptors from shaders. Because the descriptors are global for
all stages, there is no need to add separate indices for GFX9.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Marek Olšák <marek.olsak at amd.com>

---

 src/gallium/drivers/radeonsi/si_shader.c          | 19 +++++++++++++++++++
 src/gallium/drivers/radeonsi/si_shader.h          |  4 +++-
 src/gallium/drivers/radeonsi/si_shader_internal.h |  1 +
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 3f4d847d66..f02fc9e9ba 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2900,6 +2900,9 @@ static void si_set_ls_return_value_for_tcs(struct si_shader_context *ctx)
 	ret = si_insert_input_ret(ctx, ret, ctx->param_merged_wave_info, 3);
 	ret = si_insert_input_ret(ctx, ret, ctx->param_tcs_factor_offset, 4);
 	ret = si_insert_input_ret(ctx, ret, ctx->param_merged_scratch_offset, 5);
+	ret = si_insert_input_ptr_as_2xi32(ctx, ret,
+		ctx->param_bindless_samplers_and_images,
+		8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES);
 
 	ret = si_insert_input_ret(ctx, ret, ctx->param_vs_state_bits,
 				  8 + SI_SGPR_VS_STATE_BITS);
@@ -2938,6 +2941,9 @@ static void si_set_es_return_value_for_gs(struct si_shader_context *ctx)
 	ret = si_insert_input_ret(ctx, ret, ctx->param_merged_wave_info, 3);
 
 	ret = si_insert_input_ret(ctx, ret, ctx->param_merged_scratch_offset, 5);
+	ret = si_insert_input_ptr_as_2xi32(ctx, ret,
+		ctx->param_bindless_samplers_and_images,
+		8 + SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES);
 
 	unsigned desc_param = ctx->param_vs_state_bits + 1;
 	ret = si_insert_input_ptr_as_2xi32(ctx, ret, desc_param,
@@ -4249,6 +4255,8 @@ static void declare_default_desc_pointers(struct si_shader_context *ctx,
 {
 	ctx->param_rw_buffers = add_arg(fninfo, ARG_SGPR,
 		si_const_array(ctx->v4i32, SI_NUM_RW_BUFFERS));
+	ctx->param_bindless_samplers_and_images = add_arg(fninfo, ARG_SGPR,
+		si_const_array(ctx->v8i32, 0));
 	declare_per_stage_desc_pointers(ctx, fninfo, true);
 }
 
@@ -4388,6 +4396,10 @@ static void create_function(struct si_shader_context *ctx)
 
 		add_arg(&fninfo, ARG_SGPR, ctx->i32); /* unused */
 		add_arg(&fninfo, ARG_SGPR, ctx->i32); /* unused */
+
+		ctx->param_bindless_samplers_and_images =
+			add_arg(&fninfo, ARG_SGPR, si_const_array(ctx->v8i32, 0));
+
 		declare_per_stage_desc_pointers(ctx, &fninfo,
 						ctx->type == PIPE_SHADER_VERTEX);
 		declare_vs_specific_input_sgprs(ctx, &fninfo);
@@ -4442,6 +4454,10 @@ static void create_function(struct si_shader_context *ctx)
 
 		add_arg(&fninfo, ARG_SGPR, ctx->i32); /* unused */
 		add_arg(&fninfo, ARG_SGPR, ctx->i32); /* unused */
+
+		ctx->param_bindless_samplers_and_images =
+			add_arg(&fninfo, ARG_SGPR, si_const_array(ctx->v8i32, 0));
+
 		declare_per_stage_desc_pointers(ctx, &fninfo,
 						(ctx->type == PIPE_SHADER_VERTEX ||
 						 ctx->type == PIPE_SHADER_TESS_EVAL));
@@ -6886,6 +6902,7 @@ static void si_build_tcs_epilog_function(struct si_shader_context *ctx,
 		add_arg(&fninfo, ARG_SGPR, ctx->i64);
 		add_arg(&fninfo, ARG_SGPR, ctx->i64);
 		add_arg(&fninfo, ARG_SGPR, ctx->i64);
+		add_arg(&fninfo, ARG_SGPR, ctx->i64);
 		add_arg(&fninfo, ARG_SGPR, ctx->i32);
 		add_arg(&fninfo, ARG_SGPR, ctx->i32);
 		add_arg(&fninfo, ARG_SGPR, ctx->i32);
@@ -6899,6 +6916,7 @@ static void si_build_tcs_epilog_function(struct si_shader_context *ctx,
 		add_arg(&fninfo, ARG_SGPR, ctx->i64);
 		add_arg(&fninfo, ARG_SGPR, ctx->i64);
 		add_arg(&fninfo, ARG_SGPR, ctx->i64);
+		add_arg(&fninfo, ARG_SGPR, ctx->i64);
 		ctx->param_tcs_offchip_layout = add_arg(&fninfo, ARG_SGPR, ctx->i32);
 		add_arg(&fninfo, ARG_SGPR, ctx->i32);
 		add_arg(&fninfo, ARG_SGPR, ctx->i32);
@@ -7247,6 +7265,7 @@ static void si_build_ps_epilog_function(struct si_shader_context *ctx,
 
 	/* Declare input SGPRs. */
 	ctx->param_rw_buffers = add_arg(&fninfo, ARG_SGPR, ctx->i64);
+	ctx->param_bindless_samplers_and_images = add_arg(&fninfo, ARG_SGPR, ctx->i64);
 	ctx->param_const_and_shader_buffers = add_arg(&fninfo, ARG_SGPR, ctx->i64);
 	ctx->param_samplers_and_images = add_arg(&fninfo, ARG_SGPR, ctx->i64);
 	add_arg_checked(&fninfo, ARG_SGPR, ctx->f32, SI_PARAM_ALPHA_REF);
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index c41b10714e..0c0fa10f40 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -159,6 +159,8 @@ enum {
 	 */
 	SI_SGPR_RW_BUFFERS,  /* rings (& stream-out, VS only) */
 	SI_SGPR_RW_BUFFERS_HI,
+	SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES,
+	SI_SGPR_BINDLESS_SAMPLERS_AND_IMAGES_HI,
 	SI_SGPR_CONST_AND_SHADER_BUFFERS,
 	SI_SGPR_CONST_AND_SHADER_BUFFERS_HI,
 	SI_SGPR_SAMPLERS_AND_IMAGES,
@@ -219,7 +221,7 @@ enum {
 
 /* LLVM function parameter indices */
 enum {
-	SI_NUM_RESOURCE_PARAMS = 3,
+	SI_NUM_RESOURCE_PARAMS = 4,
 
 	/* PS only parameters */
 	SI_PARAM_ALPHA_REF = SI_NUM_RESOURCE_PARAMS,
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index 808996adf5..f304295cb6 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -123,6 +123,7 @@ struct si_shader_context {
 	int param_rw_buffers;
 	int param_const_and_shader_buffers;
 	int param_samplers_and_images;
+	int param_bindless_samplers_and_images;
 	/* Common inputs for merged shaders. */
 	int param_merged_wave_info;
 	int param_merged_scratch_offset;