Mesa (master): anv: set right datatypes in anv_pipeline_binding

[Juan Antonio Suárez Romero]

Module: Mesa
Branch: master
Commit: a2234614b6a7b53b4f8ba68e0bc9136e4b265d0e
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a2234614b6a7b53b4f8ba68e0bc9136e4b265d0e

Author: Juan A. Suarez Romero <jasuarez at igalia.com>
Date:   Fri Aug 25 17:31:14 2017 +0200

anv: set right datatypes in anv_pipeline_binding

This structure contains two fields, binding and index, that store the
binding in the descriptor set and the index inside the binding.

These structures are defined as uint8_t, but the types in Vulkan
specification are uint32_t, so big values are clamp.

This fixes dEQP-VK.binding_model.shader_access.*.multiple_arbitrary_descriptors.*

v2: use UINT32_MAX for index when having no render targets (Tapani)

Reviewed-by: Tapani Pälli <tapani.palli at intel.com>

---

 src/intel/vulkan/anv_pipeline.c  | 2 +-
 src/intel/vulkan/anv_private.h   | 4 ++--
 src/intel/vulkan/genX_pipeline.c | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 8306cd366a..94e99d8437 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -907,7 +907,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
          rt_bindings[0] = (struct anv_pipeline_binding) {
             .set = ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS,
             .binding = 0,
-            .index = UINT8_MAX,
+            .index = UINT32_MAX,
          };
          num_rts = 1;
       }
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index b30b71f336..674bc28cc0 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1246,10 +1246,10 @@ struct anv_pipeline_binding {
    uint8_t set;
 
    /* Binding in the descriptor set */
-   uint8_t binding;
+   uint32_t binding;
 
    /* Index in the binding */
-   uint8_t index;
+   uint32_t index;
 
    /* Input attachment index (relative to the subpass) */
    uint8_t input_attachment_index;
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 8065163dc4..83c4487bf9 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1346,7 +1346,7 @@ has_color_buffer_write_enabled(const struct anv_pipeline *pipeline)
       if (bind_map->surface_to_descriptor[i].set !=
           ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS)
          continue;
-      if (bind_map->surface_to_descriptor[i].index != UINT8_MAX)
+      if (bind_map->surface_to_descriptor[i].index != UINT32_MAX)
          return true;
    }