Mesa (master): freedreno/ir3: handle input/output component

[Rob Clark]

Module: Mesa
Branch: master
Commit: 77c595358fa99fe2ccb4f100f1d1a5b061c6c488
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=77c595358fa99fe2ccb4f100f1d1a5b061c6c488

Author: Rob Clark <robdclark at gmail.com>
Date:   Tue Dec  5 08:40:18 2017 -0500

freedreno/ir3: handle input/output component

After the mesa/st nir linking support, we start to see inputs/outputs
like:

   decl_var shader_out INTERP_MODE_NONE float packed:uv (VARYING_SLOT_VAR9.x, 1, 0)
   decl_var shader_out INTERP_MODE_NONE float packed:uv at 0 (VARYING_SLOT_VAR9.y, 1, 0)

(ie. were location_frac != .x)

Unfortunately I overlooked the addition of the component parameter to
load_input/store_output, so when we started encountering inputs/outputs
with component other than .x, we'd end up loading/storing the wrong
input/output.

Signed-off-by: Rob Clark <robdclark at gmail.com>

---

 src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index c97df4f1d6..15a3aa4c80 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -1928,7 +1928,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 	struct ir3_instruction * const *src;
 	struct ir3_block *b = ctx->block;
 	nir_const_value *const_offset;
-	int idx;
+	int idx, comp;
 
 	if (info->has_dest) {
 		unsigned n;
@@ -1971,11 +1971,12 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 		break;
 	case nir_intrinsic_load_input:
 		idx = nir_intrinsic_base(intr);
+		comp = nir_intrinsic_component(intr);
 		const_offset = nir_src_as_const_value(intr->src[0]);
 		if (const_offset) {
 			idx += const_offset->u32[0];
 			for (int i = 0; i < intr->num_components; i++) {
-				unsigned n = idx * 4 + i;
+				unsigned n = idx * 4 + i + comp;
 				dst[i] = ctx->ir->inputs[n];
 			}
 		} else {
@@ -1984,7 +1985,7 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 					create_collect(b, ctx->ir->inputs, ctx->ir->ninputs);
 			struct ir3_instruction *addr = get_addr(ctx, src[0], 4);
 			for (int i = 0; i < intr->num_components; i++) {
-				unsigned n = idx * 4 + i;
+				unsigned n = idx * 4 + i + comp;
 				dst[i] = create_indirect_load(ctx, ctx->ir->ninputs,
 						n, addr, collect);
 			}
@@ -2061,13 +2062,14 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
 		break;
 	case nir_intrinsic_store_output:
 		idx = nir_intrinsic_base(intr);
+		comp = nir_intrinsic_component(intr);
 		const_offset = nir_src_as_const_value(intr->src[1]);
 		compile_assert(ctx, const_offset != NULL);
 		idx += const_offset->u32[0];
 
 		src = get_src(ctx, &intr->src[0]);
 		for (int i = 0; i < intr->num_components; i++) {
-			unsigned n = idx * 4 + i;
+			unsigned n = idx * 4 + i + comp;
 			ctx->ir->outputs[n] = src[i];
 		}
 		break;