Mesa (master): anv/device: Increase the UBO alignment requirement to 32
Jason Ekstrand
jekstrand at kemper.freedesktop.org
Sat Dec 9 00:16:09 UTC 2017
Module: Mesa
Branch: master
Commit: 8d34077182d8408923e5239ece882b081670b528
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d34077182d8408923e5239ece882b081670b528
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Fri Dec 1 16:07:23 2017 -0800
anv/device: Increase the UBO alignment requirement to 32
Push constants work in terms of 32-byte chunks so if we want to be able
to push UBOs, every thing needs to be 32-byte aligned. Currently, we
only require 16-byte which is too small.
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
---
src/intel/vulkan/anv_device.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 55b77f9071..8eb5a9342a 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -849,7 +849,8 @@ void anv_GetPhysicalDeviceProperties(
.viewportSubPixelBits = 13, /* We take a float? */
.minMemoryMapAlignment = 4096, /* A page */
.minTexelBufferOffsetAlignment = 1,
- .minUniformBufferOffsetAlignment = 16,
+ /* We need 16 for UBO block reads to work and 32 for push UBOs */
+ .minUniformBufferOffsetAlignment = 32,
.minStorageBufferOffsetAlignment = 4,
.minTexelOffset = -8,
.maxTexelOffset = 7,
@@ -1915,8 +1916,15 @@ void anv_GetBufferMemoryRequirements(
memory_types |= (1u << i);
}
+ /* Base alignment requirement of a cache line */
+ uint32_t alignment = 16;
+
+ /* We need an alignment of 32 for pushing UBOs */
+ if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_BUFFER_BIT)
+ alignment = MAX2(alignment, 32);
+
pMemoryRequirements->size = buffer->size;
- pMemoryRequirements->alignment = 16;
+ pMemoryRequirements->alignment = alignment;
pMemoryRequirements->memoryTypeBits = memory_types;
}
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