Mesa (master): intel/decoder: Take a bit offset in gen_print_group
Jason Ekstrand
jekstrand at kemper.freedesktop.org
Thu Dec 14 21:27:36 UTC 2017
Module: Mesa
Branch: master
Commit: a7ae72032f550d9680673b67b1e81452d0b74fed
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a7ae72032f550d9680673b67b1e81452d0b74fed
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Tue Dec 12 17:36:47 2017 -0800
intel/decoder: Take a bit offset in gen_print_group
Previously, if a group was nested in another group such that it didn't
start on a dword boundary, we would decode it as if it started at the
start of its first dword. This changes things to work even more in
terms of bits so that we can properly decode these structs. This
affects MOCS, attribute swizzles, and several other things.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
src/intel/common/gen_decoder.c | 15 ++++++++-------
src/intel/common/gen_decoder.h | 5 +++--
src/intel/tools/aubinator.c | 2 +-
src/intel/tools/aubinator_error_decode.c | 18 ++++++++++--------
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 10 +++++-----
5 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/src/intel/common/gen_decoder.c b/src/intel/common/gen_decoder.c
index 59c76eab7e..4f373a371e 100644
--- a/src/intel/common/gen_decoder.c
+++ b/src/intel/common/gen_decoder.c
@@ -851,8 +851,8 @@ iter_decode_field_raw(struct gen_field_iterator *iter)
{
uint64_t qw = 0;
- int field_start = iter->bit;
- int field_end = iter->bit + (iter->field->end - iter->field->start);
+ int field_start = iter->p_bit + iter->bit;
+ int field_end = field_start + (iter->field->end - iter->field->start);
const uint32_t *p = iter->p + (iter->bit / 32);
if ((field_end - field_start) > 32) {
@@ -959,7 +959,7 @@ iter_decode_field(struct gen_field_iterator *iter)
void
gen_field_iterator_init(struct gen_field_iterator *iter,
struct gen_group *group,
- const uint32_t *p,
+ const uint32_t *p, int p_bit,
bool print_colors)
{
memset(iter, 0, sizeof(*iter));
@@ -970,6 +970,7 @@ gen_field_iterator_init(struct gen_field_iterator *iter,
else
iter->field = group->next->fields;
iter->p = p;
+ iter->p_bit = p_bit;
iter->p_end = &p[gen_group_get_length(iter->group, iter->p)];
iter->print_colors = print_colors;
@@ -1011,13 +1012,13 @@ gen_field_is_header(struct gen_field *field)
}
void
-gen_print_group(FILE *outfile, struct gen_group *group,
- uint64_t offset, const uint32_t *p, bool color)
+gen_print_group(FILE *outfile, struct gen_group *group, uint64_t offset,
+ const uint32_t *p, int p_bit, bool color)
{
struct gen_field_iterator iter;
int last_dword = -1;
- gen_field_iterator_init(&iter, group, p, color);
+ gen_field_iterator_init(&iter, group, p, p_bit, color);
do {
int iter_dword = iter.bit / 32;
if (last_dword != iter_dword) {
@@ -1030,7 +1031,7 @@ gen_print_group(FILE *outfile, struct gen_group *group,
if (iter.struct_desc) {
uint64_t struct_offset = offset + 4 * iter_dword;
gen_print_group(outfile, iter.struct_desc, struct_offset,
- &p[iter_dword], color);
+ &p[iter_dword], iter.bit % 32, color);
}
}
} while (gen_field_iterator_next(&iter));
diff --git a/src/intel/common/gen_decoder.h b/src/intel/common/gen_decoder.h
index a45e0a250d..37eebd7fce 100644
--- a/src/intel/common/gen_decoder.h
+++ b/src/intel/common/gen_decoder.h
@@ -69,6 +69,7 @@ struct gen_field_iterator {
char value[128];
struct gen_group *struct_desc;
const uint32_t *p;
+ int p_bit; /**< bit offset into p */
const uint32_t *p_end;
int bit; /**< current field starts at this bit offset into p */
@@ -171,14 +172,14 @@ struct gen_field {
void gen_field_iterator_init(struct gen_field_iterator *iter,
struct gen_group *group,
- const uint32_t *p,
+ const uint32_t *p, int p_bit,
bool print_colors);
bool gen_field_iterator_next(struct gen_field_iterator *iter);
void gen_print_group(FILE *out,
struct gen_group *group,
- uint64_t offset, const uint32_t *p,
+ uint64_t offset, const uint32_t *p, int p_bit,
bool color);
#ifdef __cplusplus
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 48d4456cc1..45b9566ece 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -100,7 +100,7 @@ decode_group(struct gen_group *strct, const uint32_t *p, int starting_dword)
{
uint64_t offset = option_print_offsets ? (void *) p - gtt : 0;
- gen_print_group(outfile, strct, offset, p, option_color == COLOR_ALWAYS);
+ gen_print_group(outfile, strct, offset, p, 0, option_color == COLOR_ALWAYS);
}
static void
diff --git a/src/intel/tools/aubinator_error_decode.c b/src/intel/tools/aubinator_error_decode.c
index 91e084574c..ecc01b55e7 100644
--- a/src/intel/tools/aubinator_error_decode.c
+++ b/src/intel/tools/aubinator_error_decode.c
@@ -68,8 +68,10 @@ print_register(struct gen_spec *spec, const char *name, uint32_t reg)
{
struct gen_group *reg_spec = gen_spec_find_register_by_name(spec, name);
- if (reg_spec)
- gen_print_group(stdout, reg_spec, 0, ®, option_color == COLOR_ALWAYS);
+ if (reg_spec) {
+ gen_print_group(stdout, reg_spec, 0, ®, 0,
+ option_color == COLOR_ALWAYS);
+ }
}
struct ring_register_mapping {
@@ -277,7 +279,7 @@ decode(struct gen_spec *spec, struct gen_disasm *disasm,
printf("%s0x%08"PRIx64": 0x%08x: %-80s%s\n",
color, offset, p[0], gen_group_get_name(inst), reset_color);
- gen_print_group(stdout, inst, offset, p,
+ gen_print_group(stdout, inst, offset, p, 0,
option_color == COLOR_ALWAYS);
if (strcmp(inst->name, "MI_BATCH_BUFFER_END") == 0)
@@ -285,7 +287,7 @@ decode(struct gen_spec *spec, struct gen_disasm *disasm,
if (strcmp(inst->name, "STATE_BASE_ADDRESS") == 0) {
struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
+ gen_field_iterator_init(&iter, inst, p, 0, false);
do {
if (strcmp(iter.name, "Instruction Base Address") == 0) {
@@ -298,7 +300,7 @@ decode(struct gen_spec *spec, struct gen_disasm *disasm,
strcmp(inst->name, "3DSTATE_PS") == 0 ||
strcmp(inst->name, "3DSTATE_WM") == 0) {
struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
+ gen_field_iterator_init(&iter, inst, p, 0, false);
uint64_t ksp[3] = {0, 0, 0};
bool enabled[3] = {false, false, false};
@@ -356,7 +358,7 @@ decode(struct gen_spec *spec, struct gen_disasm *disasm,
strcmp(inst->name, "3DSTATE_GS") == 0 ||
strcmp(inst->name, "3DSTATE_VS") == 0) {
struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
+ gen_field_iterator_init(&iter, inst, p, 0, false);
uint64_t ksp = 0;
bool is_simd8 = false; /* vertex shaders on Gen8+ only */
bool is_enabled = true;
@@ -390,7 +392,7 @@ decode(struct gen_spec *spec, struct gen_disasm *disasm,
}
} else if (strcmp(inst->name, "MEDIA_INTERFACE_DESCRIPTOR_LOAD") == 0) {
struct gen_field_iterator iter;
- gen_field_iterator_init(&iter, inst, p, false);
+ gen_field_iterator_init(&iter, inst, p, 0, false);
uint64_t interface_offset = 0;
do {
if (strcmp(iter.name, "Interface Descriptor Data Start Address") == 0) {
@@ -404,7 +406,7 @@ decode(struct gen_spec *spec, struct gen_disasm *disasm,
gen_spec_find_struct(spec, "INTERFACE_DESCRIPTOR_DATA");
uint32_t *desc_p =
((void *)current_dynamic_state_buffer->data) + interface_offset;
- gen_field_iterator_init(&iter, desc, desc_p, false);
+ gen_field_iterator_init(&iter, desc, desc_p, 0, false);
do {
if (strcmp(iter.name, "Kernel Start Pointer") == 0) {
uint64_t ksp = strtol(iter.value, NULL, 16);
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 91a6506a89..0e090f4625 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -401,7 +401,7 @@ decode_struct(struct brw_context *brw, struct gen_spec *spec,
fprintf(stderr, "%s\n", struct_name);
gen_print_group(stderr, group, gtt_offset + offset,
- &data[offset / 4], color);
+ &data[offset / 4], 0, color);
}
static void
@@ -418,7 +418,7 @@ decode_structs(struct brw_context *brw, struct gen_spec *spec,
for (int i = 0; i < entries; i++) {
fprintf(stderr, "%s %d\n", struct_name, i);
gen_print_group(stderr, group, gtt_offset + offset,
- &data[(offset + i * struct_size) / 4], color);
+ &data[(offset + i * struct_size) / 4], 0, color);
}
}
@@ -463,7 +463,7 @@ do_batch_dump(struct brw_context *brw)
fprintf(stderr, "%s0x%08"PRIx64": 0x%08x: %-80s%s\n", header_color,
offset, p[0], gen_group_get_name(inst), reset_color);
- gen_print_group(stderr, inst, offset, p, color);
+ gen_print_group(stderr, inst, offset, p, 0, color);
switch (gen_group_get_opcode(inst) >> 16) {
case _3DSTATE_PIPELINED_POINTERS:
@@ -505,7 +505,7 @@ do_batch_dump(struct brw_context *brw)
for (int i = 0; i < bt_entries; i++) {
fprintf(stderr, "SURFACE_STATE - BTI = %d\n", i);
gen_print_group(stderr, group, state_gtt_offset + bt_pointers[i],
- &state[bt_pointers[i] / 4], color);
+ &state[bt_pointers[i] / 4], 0, color);
}
break;
}
@@ -579,7 +579,7 @@ do_batch_dump(struct brw_context *brw)
for (int i = 0; i < bt_entries; i++) {
fprintf(stderr, "SURFACE_STATE - BTI = %d\n", i);
gen_print_group(stderr, group, state_gtt_offset + bt_pointers[i],
- &state[bt_pointers[i] / 4], color);
+ &state[bt_pointers[i] / 4], 0, color);
}
break;
}
More information about the mesa-commit
mailing list