Mesa (master): freedreno: context priority support

[Rob Clark]

Module: Mesa
Branch: master
Commit: 805a72404c141454ae83f28cb982a4870732928f
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=805a72404c141454ae83f28cb982a4870732928f

Author: Rob Clark <robdclark at gmail.com>
Date:   Thu Aug 24 10:22:24 2017 -0400

freedreno: context priority support

For devices (and kernels) which support different priority ringbuffers,
expose context priority support.

Signed-off-by: Rob Clark <robdclark at gmail.com>

---

 configure.ac                                      |  2 +-
 meson.build                                       |  2 +-
 src/gallium/drivers/freedreno/freedreno_context.c |  9 ++++++++-
 src/gallium/drivers/freedreno/freedreno_screen.c  | 12 +++++++++++-
 src/gallium/drivers/freedreno/freedreno_screen.h  |  1 +
 5 files changed, 22 insertions(+), 4 deletions(-)

diff --git a/configure.ac b/configure.ac
index 138459c6f7..79f275d391 100644
--- a/configure.ac
+++ b/configure.ac
@@ -78,7 +78,7 @@ LIBDRM_AMDGPU_REQUIRED=2.4.89
 LIBDRM_INTEL_REQUIRED=2.4.75
 LIBDRM_NVVIEUX_REQUIRED=2.4.66
 LIBDRM_NOUVEAU_REQUIRED=2.4.66
-LIBDRM_FREEDRENO_REQUIRED=2.4.74
+LIBDRM_FREEDRENO_REQUIRED=2.4.89
 LIBDRM_ETNAVIV_REQUIRED=2.4.82
 
 dnl Versions for external dependencies
diff --git a/meson.build b/meson.build
index 6ce6d55e17..d9f7ea9b2c 100644
--- a/meson.build
+++ b/meson.build
@@ -960,7 +960,7 @@ if with_gallium_etnaviv
   dep_libdrm_etnaviv = dependency('libdrm_etnaviv', version : '>= 2.4.82')
 endif
 if with_gallium_freedreno
-  dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 2.4.74')
+  dep_libdrm_freedreno = dependency('libdrm_freedreno', version : '>= 2.4.89')
 endif
 
 llvm_modules = ['bitwriter', 'engine', 'mcdisassembler', 'mcjit']
diff --git a/src/gallium/drivers/freedreno/freedreno_context.c b/src/gallium/drivers/freedreno/freedreno_context.c
index 66088da8c7..59e902956f 100644
--- a/src/gallium/drivers/freedreno/freedreno_context.c
+++ b/src/gallium/drivers/freedreno/freedreno_context.c
@@ -259,10 +259,17 @@ fd_context_init(struct fd_context *ctx, struct pipe_screen *pscreen,
 {
 	struct fd_screen *screen = fd_screen(pscreen);
 	struct pipe_context *pctx;
+	unsigned prio = 1;
 	int i;
 
+	/* lower numerical value == higher priority: */
+	if (flags & PIPE_CONTEXT_HIGH_PRIORITY)
+		prio = 0;
+	else if (flags & PIPE_CONTEXT_LOW_PRIORITY)
+		prio = 2;
+
 	ctx->screen = screen;
-	ctx->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
+	ctx->pipe = fd_pipe_new2(screen->dev, FD_PIPE_3D, prio);
 
 	ctx->primtypes = primtypes;
 	ctx->primtype_mask = 0;
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index cf74c8d621..f1bc568240 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -339,9 +339,11 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 	case PIPE_CAP_TILE_RASTER_ORDER:
 	case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 	case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
-	case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 		return 0;
 
+	case PIPE_CAP_CONTEXT_PRIORITY_MASK:
+		return screen->priority_mask;
+
 	case PIPE_CAP_DRAW_INDIRECT:
 		if (is_a4xx(screen) || is_a5xx(screen))
 			return 1;
@@ -842,6 +844,14 @@ fd_screen_create(struct fd_device *dev)
 	}
 	screen->chip_id = val;
 
+	if (fd_pipe_get_param(screen->pipe, FD_NR_RINGS, &val)) {
+		DBG("could not get # of rings");
+		screen->priority_mask = 0;
+	} else {
+		/* # of rings equates to number of unique priority values: */
+		screen->priority_mask = (1 << val) - 1;
+	}
+
 	DBG("Pipe Info:");
 	DBG(" GPU-id:          %d", screen->gpu_id);
 	DBG(" Chip-id:         0x%08x", screen->chip_id);
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.h b/src/gallium/drivers/freedreno/freedreno_screen.h
index 68518ef721..d5e497d4f6 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.h
+++ b/src/gallium/drivers/freedreno/freedreno_screen.h
@@ -67,6 +67,7 @@ struct fd_screen {
 	uint32_t max_rts;        /* max # of render targets */
 	uint32_t gmem_alignw, gmem_alignh;
 	uint32_t num_vsc_pipes;
+	uint32_t priority_mask;
 	bool has_timestamp;
 
 	void *compiler;          /* currently unused for a2xx */