Mesa (master): radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+

[Marek Olšák]

Module: Mesa
Branch: master
Commit: 57f18623fb94891c04f3a395cfd977ea3747ee61
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=57f18623fb94891c04f3a395cfd977ea3747ee61

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Jan 17 13:45:42 2017 +0100

radeonsi: for the tess barrier, only use emit_waitcnt on SI and LLVM 3.9+

Cc: 17.0 13.0 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Edward O'Callaghan <funfunctor at folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

---

 src/gallium/drivers/radeonsi/si_shader.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index f404273..10f40a9 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5440,10 +5440,13 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
 	struct si_shader_context *ctx = si_shader_context(bld_base);
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
 
-	/* The real barrier instruction isn’t needed, because an entire patch
+	/* SI only (thanks to a hw bug workaround):
+	 * The real barrier instruction isn’t needed, because an entire patch
 	 * always fits into a single wave.
 	 */
-	if (ctx->type == PIPE_SHADER_TESS_CTRL) {
+	if (HAVE_LLVM >= 0x0309 &&
+	    ctx->screen->b.chip_class == SI &&
+	    ctx->type == PIPE_SHADER_TESS_CTRL) {
 		emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
 		return;
 	}