Mesa (master): radv: Add compute htile clear for combined depth+stencil surfaces.

[Bas Nieuwenhuizen]

Module: Mesa
Branch: master
Commit: 1aba0e7f5841087058d57ea5286dbc30d8869982
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1aba0e7f5841087058d57ea5286dbc30d8869982

Author: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Date:   Fri Jul  7 15:56:57 2017 +0200

radv: Add compute htile clear for combined depth+stencil surfaces.

Figured out the clear value when we have a combined depth stencil
surface.

Signed-off-by: Bas Nieuwenhuizen <basni at google.com>
Reviewed-by: Dave Airlie <airlied at redhat.com>

---

 src/amd/vulkan/radv_meta_clear.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index bd979973e7..7f3cfdccc8 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -708,17 +708,15 @@ emit_fast_htile_clear(struct radv_cmd_buffer *cmd_buffer,
 	if (clear_rect->layerCount != iview->image->info.array_size)
 		goto fail;
 
-	/* Don't do stencil clears till we have figured out if the clear words are
-	 * correct. */
-	if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT)
+	if ((clear_value.depth != 0.0 && clear_value.depth != 1.0) || !(aspects & VK_IMAGE_ASPECT_DEPTH_BIT))
 		goto fail;
 
-	if (clear_value.depth == 1.0)
-		clear_word = 0xfffffff0;
-	else if (clear_value.depth == 0.0)
-		clear_word = 0;
-	else
-		goto fail;
+	if (vk_format_aspects(iview->image->vk_format) & VK_IMAGE_ASPECT_STENCIL_BIT) {
+		if (clear_value.stencil != 0 || !(aspects & VK_IMAGE_ASPECT_STENCIL_BIT))
+			goto fail;
+		clear_word = clear_value.depth ? 0xfffc0000 : 0;
+	} else
+		clear_word = clear_value.depth ? 0xfffffff0 : 0;
 
 	if (pre_flush) {
 		cmd_buffer->state.flush_bits |= (RADV_CMD_FLAG_FLUSH_AND_INV_DB |