Mesa (master): i965/miptree: Relax size alignment for linear surfaces

[Topi Pohjolainen]

Module: Mesa
Branch: master
Commit: 61c95c94a0c74f0ca3b7f36b32c541a4137d7024
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=61c95c94a0c74f0ca3b7f36b32c541a4137d7024

Author: Topi Pohjolainen <topi.pohjolainen at intel.com>
Date:   Wed Jun 28 12:11:16 2017 +0300

i965/miptree: Relax size alignment for linear surfaces

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>

---

 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 984529d883..73637b0fc5 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -822,7 +822,12 @@ make_surface(struct brw_context *brw, GLenum target, mesa_format format,
       }
    }
 
-   assert(mt->surf.size % mt->surf.row_pitch == 0);
+   /* In case of linear the buffer gets padded by fixed 64 bytes and therefore
+    * the size may not be multiple of row_pitch.
+    * See isl_apply_surface_padding().
+    */
+   if (mt->surf.tiling != ISL_TILING_LINEAR)
+      assert(mt->surf.size % mt->surf.row_pitch == 0);
 
    if (!bo) {
       mt->bo = brw_bo_alloc_tiled(brw->bufmgr, "isl-miptree",