Mesa (master): intel/isl: Add surface state clear value information

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: 01db9a74c6b39984c50a9794e69908aab51d67c4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=01db9a74c6b39984c50a9794e69908aab51d67c4

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Tue Jan 24 15:55:57 2017 -0800

intel/isl: Add surface state clear value information

This will be used to load and store clear values from surface state
objects.

Signed-off-by: Nanley Chery <nanley.g.chery at intel.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

---

 src/intel/isl/isl.c | 9 +++++++++
 src/intel/isl/isl.h | 4 ++++
 2 files changed, 13 insertions(+)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index e7e5530e5b..5465496b8f 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -73,6 +73,15 @@ isl_device_init(struct isl_device *dev,
    dev->ss.size = RENDER_SURFACE_STATE_length(info) * 4;
    dev->ss.align = isl_align(dev->ss.size, 32);
 
+   dev->ss.clear_value_size =
+      isl_align(RENDER_SURFACE_STATE_RedClearColor_bits(info) +
+                RENDER_SURFACE_STATE_GreenClearColor_bits(info) +
+                RENDER_SURFACE_STATE_BlueClearColor_bits(info) +
+                RENDER_SURFACE_STATE_AlphaClearColor_bits(info), 32) / 8;
+
+   dev->ss.clear_value_offset =
+      RENDER_SURFACE_STATE_RedClearColor_start(info) / 32 * 4;
+
    assert(RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) % 8 == 0);
    dev->ss.addr_offset =
       RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) / 8;
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 92d2ffc31a..fcf03b1a5b 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -919,6 +919,10 @@ struct isl_device {
       uint8_t align;
       uint8_t addr_offset;
       uint8_t aux_addr_offset;
+
+      /* Rounded up to the nearest dword to simplify GPU memcpy operations. */
+      uint8_t clear_value_size;
+      uint8_t clear_value_offset;
    } ss;
 
    /**