Mesa (master): r600: add missing RAT registers and operations.
Dave Airlie
airlied at kemper.freedesktop.org
Mon Jun 5 20:10:01 UTC 2017
Module: Mesa
Branch: master
Commit: a6b71f758868931368c1d6369795e161c975fdc6
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6b71f758868931368c1d6369795e161c975fdc6
Author: Dave Airlie <airlied at redhat.com>
Date: Mon Jun 5 13:22:07 2017 +1000
r600: add missing RAT registers and operations.
This just documents in the headers the RAT operation list,
and the RAT encoding for exports.
The immediate registers are used to point to buffers for the
RAT return values (_RTN instructions).
Reviewed-by: Glenn Kennard <glenn.kennard at gmail.com>
---
src/gallium/drivers/r600/eg_sq.h | 12 ++++++++++++
src/gallium/drivers/r600/evergreend.h | 12 ++++++++++++
src/gallium/drivers/r600/r600_sq.h | 35 +++++++++++++++++++++++++++++++++++
3 files changed, 59 insertions(+)
diff --git a/src/gallium/drivers/r600/eg_sq.h b/src/gallium/drivers/r600/eg_sq.h
index f542a0c5a3..e56fdd6d79 100644
--- a/src/gallium/drivers/r600/eg_sq.h
+++ b/src/gallium/drivers/r600/eg_sq.h
@@ -176,6 +176,18 @@
#define G_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(x) (((x) >> 30) & 0x3)
#define C_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE 0x3FFFFFFF
/* done */
+
+#define P_SQ_CF_ALLOC_EXPORT_WORD0_RAT
+#define S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_ID(x) (((x) & 0xF) << 0)
+#define G_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_ID(x) (((x) >> 0) & 0xF)
+#define C_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_ID 0xFFFFFFF0
+#define S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INST(x) (((x) & 0x3F) << 4)
+#define G_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INST(x) (((x) >> 4) & 0x3F)
+#define C_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INST 0xFFFFFC0F
+#define S_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INDEX_MODE(x) (((x) & 0x3) << 11)
+#define G_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INDEX_MODE(x) (((x) >> 11) & 0x3)
+#define C_SQ_CF_ALLOC_EXPORT_WORD0_RAT_RAT_INDEX_MODE 0xFFFFE7FF
+
#define P_SQ_CF_ALLOC_EXPORT_WORD1
#define S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(x) (((unsigned)(x) & 0xF) << 16)
#define G_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(x) (((x) >> 16) & 0xF)
diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index 09ff3207a1..cbcf8018da 100644
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -2230,6 +2230,18 @@
#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4)
#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8)
#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12)
+#define R_028B9C_CB_IMMED0_BASE 0x00028B9C
+#define R_028BA0_CB_IMMED1_BASE 0x00028BA0
+#define R_028BA4_CB_IMMED2_BASE 0x00028BA4
+#define R_028BA4_CB_IMMED3_BASE 0x00028BA8
+#define R_028BA4_CB_IMMED4_BASE 0x00028BAC
+#define R_028BA4_CB_IMMED5_BASE 0x00028BB0
+#define R_028BA4_CB_IMMED6_BASE 0x00028BB4
+#define R_028BA4_CB_IMMED7_BASE 0x00028BB8
+#define R_028BA4_CB_IMMED8_BASE 0x00028BBC
+#define R_028BA4_CB_IMMED9_BASE 0x00028BC0
+#define R_028BA4_CB_IMMED10_BASE 0x00028BC4
+#define R_028BA4_CB_IMMED11_BASE 0x00028BC8
#define R_028C00_PA_SC_LINE_CNTL 0x00028C00
#define S_028C00_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9)
#define G_028C00_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1)
diff --git a/src/gallium/drivers/r600/r600_sq.h b/src/gallium/drivers/r600/r600_sq.h
index d58c6f918c..3526668c4b 100644
--- a/src/gallium/drivers/r600/r600_sq.h
+++ b/src/gallium/drivers/r600/r600_sq.h
@@ -493,4 +493,39 @@
#define SQ_VTX_FETCH_INSTANCE_DATA 1
#define SQ_VTX_FETCH_NO_INDEX_OFFSET 2
+/* EG RAT functions */
+#define V_RAT_INST_NOP 0
+#define V_RAT_INST_STORE_TYPED 1
+#define V_RAT_INST_CMPXCHG_INT 4
+#define V_RAT_INST_ADD 7
+#define V_RAT_INST_SUB 8
+#define V_RAT_INST_RSUB 9
+#define V_RAT_INST_MIN_INT 10
+#define V_RAT_INST_MIN_UINT 11
+#define V_RAT_INST_MAX_INT 12
+#define V_RAT_INST_MAX_UINT 13
+#define V_RAT_INST_AND 14
+#define V_RAT_INST_OR 15
+#define V_RAT_INST_XOR 16
+#define V_RAT_INST_INC_UINT 18
+#define V_RAT_INST_DEC_UINT 19
+#define V_RAT_INST_STORE_DWORD 20
+#define V_RAT_INST_STORE_SHORT 21
+#define V_RAT_INST_STORE_BYTE 22
+#define V_RAT_INST_NOP_RTN 32
+#define V_RAT_INST_XCHG_RTN 34
+#define V_RAT_INST_CMPXCHG_INT_RTN 36
+#define V_RAT_INST_ADD_RTN 39
+#define V_RAT_INST_SUB_RTN 40
+#define V_RAT_INST_RSUB_RTN 41
+#define V_RAT_INST_MIN_INT_RTN 42
+#define V_RAT_INST_MIN_UINT_RTN 43
+#define V_RAT_INST_MAX_INT_RTN 44
+#define V_RAT_INST_MAX_UINT_RTN 45
+#define V_RAT_INST_AND_RTN 46
+#define V_RAT_INST_OR_RTN 47
+#define V_RAT_INST_XOR_RTN 48
+#define V_RAT_INST_INC_UINT_RTN 50
+#define V_RAT_INST_DEC_UINT_RTN 51
+
#endif
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