Mesa (master): i965: Set step_rate = 0 for interleaved vertex buffers

[Jason Ekstrand]

Module: Mesa
Branch: master
Commit: f762962f7ffd280ee1fd4280744800f73e133901
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f762962f7ffd280ee1fd4280744800f73e133901

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Tue Jun  6 17:53:26 2017 -0700

i965: Set step_rate = 0 for interleaved vertex buffers

Before, we weren't setting step rate so we got whatever old value
happened to be lying around.  This can lead to some interesting
rendering errors.  In particular, if you run the OpenGL ES CTS with
dEQP-GLES3.functional.instanced.types.mat2x4 immediately followed by one
of the dEQP-GLES3.functional.transform_feedback.* tests, the transform
feedback test gets stale instancing data from the other test and fails.
The only thing that is causing this to not be a problem today is that we
use meta for clears and meta is setting up vertex buffers via the VBO or
non-interleaved path and setting step_rate to 0 for us.  When blorp
depth/stencil clears are enabled, meta is no longer sitting between the
two tests and the stale data starts causing noticeable problems.

Cc: "17.1" <mesa-stable at lists.freedesktop.org>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>

---

 src/mesa/drivers/dri/i965/brw_draw_upload.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index cf66770916..05b6b1a50f 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -648,6 +648,7 @@ brw_prepare_vertices(struct brw_context *brw)
 				 buffer, interleaved);
 	 buffer->offset -= delta * interleaved;
          buffer->size += delta * interleaved;
+         buffer->step_rate = 0;
 
 	 for (i = 0; i < nr_uploads; i++) {
 	    /* Then, just point upload[i] at upload[0]'s buffer. */